Manufacturing method of trench double-layer gate mosfet

Abstract

The invention discloses a method for manufacturing a trench-type double-layer gate MOSFET, comprising the steps of: forming a plurality of trenches, the trenches including a plurality of gate trenches and at least one source extraction trench; forming a bottom dielectric layer and a source polysilicon ; use HDP CVD deposition plus etching process to form an inter-polysilicon oxide layer; form a gate dielectric layer; perform polysilicon deposition to form a second polysilicon layer; etch back the second polysilicon layer, and fill it after etching back The second polysilicon layer in the gate trench forms the polysilicon gate, and the remaining second polysilicon layer is also reserved on the side of the source extraction trench; the dielectric layer under the metal is grown, and the growth thickness is greater than the target thickness, and the dielectric layer under the metal is grown. The growth thickness of the layer is sufficient to completely fill the gap region in the source extraction trench; perform wet etching to reduce the thickness of the dielectric layer under the metal to the target thickness; step 9, etch to form the opening of the contact hole and fill it with metal. The invention can reduce the process cost and improve the product quality.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a trench type double-layer gate MOSFET. Background technique [0002] The existing first manufacturing method of trench double-layer gate MOSFET: [0003] Such as Figure 1A to Figure 1F Shown is a schematic diagram of the device structure in each step of the existing first trench type double-layer gate MOSFET manufacturing method; the existing first trench type double-layer gate MOSFET manufacturing method includes the following steps: [0004] Step 1, such as Figure 1A As shown, a plurality of trenches 102 are formed on a semiconductor substrate 101 by photolithography definition plus etching process, and the trenches 102 include a plurality of gate trenches and at least one source extraction trench, and the gate trenches are formed in In the device unit area, the source extraction trench is located outside the device...

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Problems solved by technology

[0044] Although the existing second method does not need to use a single photolithography process to protect the top of the source extraction trench before performing the etching back of the inter-polysilicon oxide layer 205; however, since the width of the source extraction trench 202b is enlarged, After the second polysilicon layer 207 is filled in step five, a gap region will be formed on the top of the source extraction trench 202b, and the gap region will increase after the second polysilicon layer 207 is etched back, which will make the growth in step seven After the metal lower dielectric layer 208, it cannot be guaranteed that the metal lower dielectric layer 208 will completely fill the gap area at the top of the source extraction trench 202b, which will affect the stability of the subsequent first contact hole, thereby affecting the quality of the product

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