Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

High-speed three-level parallel analog-to-digital converter of CMOS image sensor and operation method of high-speed three-level parallel analog-to-digital converter

An image sensor, analog-to-digital technology, applied in the field of high-speed three-level parallel analog-to-digital converter and its calculation, can solve the problems of low internal operation speed and conversion efficiency that cannot meet the needs of use, so as to save layout area and improve analog/digital Effect of Slew Rate

Active Publication Date: 2020-02-21
NINGBO UNIV
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the traditional existing CMOS image sensor has a low internal operating speed, and its conversion efficiency has gradually failed to meet the actual needs of its use.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-speed three-level parallel analog-to-digital converter of CMOS image sensor and operation method of high-speed three-level parallel analog-to-digital converter

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0021] see figure 1 , what this embodiment provides is the high-speed three-stage parallel analog-to-digital converter of the CMOS image sensor, including CADC timing switching switch Φ CADC , Sampling and holding circuit S / H, FIADC timing switch Φ FIADC , Shared analog modules, FIADC, CADC, SSADC and counters.

[0022] FIADC is a folded integrated analog-to-digital converter, CADC is a circular analog-to-digital converter, and SSADC is a single-slope analog-to-digital converter.

[0023] Specifically, the shared analog-electric module in this embodiment includes a switched capacitor integrator SC Integrator, a 1.5-bit ADC, and a 1.5-bit DAC (digital-to-analog converter). Its specific structure is that the switched capacitor integrator SC Integrator is connected in series to the 1.5-bit ADC, the 1.5-bit ADC is connected in series to the 1.5-bit DAC, the 1.5-bit DAC is connected in series to the 1.5-bit ADC, and the switched capacitor integrator SC Integrator, 1.5-bit ADC an...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a high-speed three-level parallel analog-to-digital converter of a CMOS image sensor and an operation method of the high-speed three-level parallel analog-to-digital converter.The circuit comprises a CADC timing change-over switch, an FIADC timing change-over switch, a common analog-to-electric module, an FIADC, a CADC, an SSADC and a counter. The analog input end, the FIADC timing change-over switch, the common analog-to-electric module and the FIADC are sequentially connected in series. The output end of the FIADC is electrically connected to the sampling end of theCADC through the common analog-to-digital module so as to output analog residual quantity; the CADC timing change-over switch and the FIADC timing change-over switch are connected to the common analog-to-electric module in parallel, wherein the CADC timing selector switch, the common analog-to-digital module and the CADC are sequentially connected in series, the output end of the CADC is electrically connected to the SSADC to output analog residual quantity, and the FIADC, the CADC and the SSADC are connected to the counter in parallel to output digital residual quantity to the counter respectively. An FIADC / CAC / SSADC three-level serial / parallel assembly line structure is adopted, wherein the first-stage FIADC and the second-stage CADC are in a serial working mode and share a main common analog-to-electric module, so that the considerable layout area is saved, and only different control switches and different digital logic output counting modules are needed.

Description

【Technical field】 [0001] The invention relates to a high-speed three-stage parallel analog-to-digital converter of a CMOS image sensor and an operation method thereof, belonging to the field of digital-to-analog circuit conversion. 【Background technique】 [0002] CMOS active pixel sensors (APS) were invented in 1995. With the rapid development of standard CMOS technology, CMOS image sensors have made great progress in technical indicators such as high pixels, large dynamic range, small size, and low noise. . Now CMOS image sensor (CMOS image sensor) has become a very mainstream and extremely promising field in the development and research of integrated circuits. [0003] CMOS image sensor is a solid-state imaging sensor that uses semiconductor photoelectric effect to realize photoelectric information conversion, in which the pixel itself for photoelectric conversion and the analog and digital circuits for signal reading, storage and transmission can be realized based on sta...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H03M1/66
CPCH03M1/662
Inventor 王李栋魏志恒王刚陈达朱伟赵梦晗
Owner NINGBO UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products