Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

MOS device manufacturing method

A technology of MOS devices and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems that the effect cannot reach the expected effect and the requirements of the process cannot be met, so as to save processing time and improve performance , the effect of suppressing the hot carrier injection effect

Active Publication Date: 2022-06-03
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its effect can not achieve the expected effect, can not meet the requirements of the process

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • MOS device manufacturing method
  • MOS device manufacturing method
  • MOS device manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] Step S2: the high-voltage device region is formed with a first gate structure, and the core device region is formed with a second gate

[0034] Step S5: removing the first spacer layer on the semiconductor substrate in the core device region, exposing the portion

[0035] Step S6: forming an epitaxial silicon layer on the exposed semiconductor substrate, through the epitaxial layer forming process

[0036] Please refer to FIG. 2, which is a schematic structural diagram of each step in a method for manufacturing a MOS device according to an embodiment of the present invention. exist

[0037] In step S3, the first spacer layer 112 covers the hard mask layer 102. can be formed by deposition

[0038] Please refer to FIG. 3. In step S4, an ion implantation process is performed on the semiconductor substrate to form an ion implantation process.

[0039] In an embodiment of the present application, the method for manufacturing the MOS device further includes, when forming the ion...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

In the manufacturing method of the MOS device provided by the present invention, by forming a first spacer layer, the first spacer layer covers the first gate structure, the second gate structure and the semiconductor substrate; performing an ion implantation process on the semiconductor substrate to form an ion implantation region; removing the first sidewall layer on the semiconductor substrate in the core device region to expose part of the semiconductor substrate; An epitaxial silicon layer is formed on the semiconductor substrate, heat is generated during the growth process of the epitaxial silicon layer, and ions in the ion implantation area can diffuse to the semiconductor substrate outside the ion implantation area. Therefore, the annealing process can be replaced, thereby suppressing the hot carrier injection effect and improving the performance of the device. In addition, because the subsequent annealing process is omitted, processing time can be saved.

Description

Manufacturing method of MOS device technical field The present invention relates to the technical field of semiconductor manufacturing, particularly a kind of manufacturing method of MOS device Background technique [0002] MOS (Metal Oxide Semiconductor) devices are well known in the art, and in the MOS device fabrication process HCI The (hot carrier injection) effect will cause the degradation of the performance of the MOS device and affect the reliability of the MOS device. For semiconductor devices, When the feature size of the device is small, strong electric fields can be generated even at not very high voltages, which can easily lead to out- current hot carriers. Therefore, in small-scale devices and large-scale integrated circuits, hot carriers are prone to appear. At present, in order to improve the HCI effect of MOS devices, lightly doped source / drain implantation (Lightly Doped Drain, referred to as LDD) ion implantation optimization method, by reducing ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8234H01L27/088H01L29/06
CPCH01L21/8234H01L27/088H01L29/0684
Inventor 汪韬唐小亮
Owner SHANGHAI HUALI MICROELECTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com