Successive Approximation Analog-to-Digital Converter with Two-step Asymmetrical Alternating Monotonic Switching

A successive approximation type, analog-to-digital converter technology, applied in analog-to-digital conversion, code conversion, instruments, etc., can solve the problems of high power consumption and large area of ​​CDAC, and achieve elimination of reset energy, area reduction, and low switching. energy effect

Active Publication Date: 2021-11-19
XI AN JIAOTONG UNIV
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Problems solved by technology

[0004] The purpose of the present invention is to overcome the high power consumption and large area of ​​CDAC existing in the prior art, and to provide a successive approximation analog-to-digital converter with two-step asymmetric alternating monotonic switching

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  • Successive Approximation Analog-to-Digital Converter with Two-step Asymmetrical Alternating Monotonic Switching
  • Successive Approximation Analog-to-Digital Converter with Two-step Asymmetrical Alternating Monotonic Switching
  • Successive Approximation Analog-to-Digital Converter with Two-step Asymmetrical Alternating Monotonic Switching

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Embodiment Construction

[0026] The present invention will be further described below in conjunction with the accompanying drawings.

[0027] see figure 1 , the present invention includes a main capacitor array, a comparator and a logic control unit, and the main capacitor array includes a sampling capacitor array MSBs array, a bridge capacitor C b And the capacitor array LSBs array, the positive input terminal and the reverse input terminal of the comparator are connected to the sampling capacitor array MSBs array, the output terminal of the comparator is connected to the logic control unit, and the logic control unit is connected to the capacitor array LSBs array; where the output code and The determination is determined by the capacitance switching process in the capacitance arrays MSBs array, PLSB array and NLSB array respectively. The conversion process of the LSBs array is divided into two steps, in which the capacitor array MSBs array is determined As a first step; correspondingly, in the ...

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Abstract

The invention discloses a successive approximation analog-to-digital converter with two-step asymmetrical alternating monotone switching. The invention adopts a multiplexing method, so the connection between the capacitor array LSBs array and the MSBs array is re-established, and in Fewer unit capacitors are switched in the first three decision cycles. Due to the use of top-plate sampling and level conversion techniques, the switching energy consumed by the LSBs array in the first two comparison cycles (MSB and MSB‑1) is zero, based on the multiplexing method and the two-step monotonic switching process, which can be clearly This ensures low switching energy from the MSB‑3 cycle until the LSB is achieved. By adopting a two-step reset method, the reset energy in the next sampling stage can be eliminated, resulting in an energy saving of 98.3%.

Description

technical field [0001] The invention belongs to the field of analog integrated circuit design, in particular to a successive approximation analog-to-digital converter with two-step asymmetric alternate monotone switching. Background technique [0002] Successive-approximation analog-to-digital converters (SAR ADCs) have been extremely influential in wireless sensor devices and high-speed communication standards due to their inherent low power consumption. Typically, the capacitive digital-to-analog converter (CDAC) of a SAR ADC accounts for a major portion of the total power consumption compared to the comparator and digital control circuitry. Researchers have put considerable effort into solving this problem, and several energy-efficient switching schemes have been published. Taking the Vcm-based switching scheme as a reference, higher-side-reset-and-set and tri-level, VMS and hybrid reduce the switching energy by 37.6%, 75.1%, 81.3% and 90.7%. In previous work, the energ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/38
CPCH03M1/38
Inventor 张国和常科刘沛董雷屈展
Owner XI AN JIAOTONG UNIV
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