FPGA prototype verification development board segmentation simulation system and method, medium and terminal

A prototype verification and simulation system technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems, design cannot be accommodated alone, and results cannot be understood, so as to speed up the development process.

Pending Publication Date: 2020-03-31
S2C
View PDF0 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the process of designing the development board, there is often a large design that cannot be accommodated in an FPGA alone, which will affect the de

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA prototype verification development board segmentation simulation system and method, medium and terminal
  • FPGA prototype verification development board segmentation simulation system and method, medium and terminal

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0028] Such as figure 2 As shown, the invention provides a kind of FPGA prototype verification development board segmentation simulation system, comprising:

[0029] The segmentation selection module is used to select an engineering design that needs to be divided according to user requirements;

[0030] The design segmentation module is used to divide the selected engineering design into multiple smaller designs by using the segmentation tool according to t...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses an FPGA prototype verification development board segmentation simulation system and method, a medium and a terminal, and the system comprises: a segmentation selection module which is used for selecting an engineering design needing to be segmented according to the demands of a user; a design segmentation module which is used for segmenting the engineering design selected to be segmented into a plurality of smaller designs by utilizing a segmentation tool according to a result selected by the segmentation selection module, and deploying the designs obtained by segmentation into a plurality of FPGAs of one or more development boards; a top layer module which is used for calling the segmented netlist files of the FPGAs with the small designs; a segmentation simulationand judgment module which is used for generating the top layer module , directly simulating the partitioned small design according to the netlist file called by the top layer module, verifying the accuracy of a simulation result. The running state of the design can be confirmed in a partitioning design and simulation mode for the large engineering design, and therefore a user can conveniently conduct large-capacity and high-complexity engineering design.

Description

technical field [0001] The invention relates to the technical field of development board simulation, in particular to an FPGA prototype verification development board segmentation simulation system, method, medium and terminal. Background technique [0002] The development board is a circuit board used for embedded system development, including a series of hardware components such as central processing unit, memory, input device, output device, data path / bus and external resource interface. Development boards are generally customized by embedded system developers themselves according to development needs, and can also be researched and designed by users themselves. The development board is for beginners to understand and learn the hardware and software of the system. At the same time, some development boards also provide the basic integrated development environment, software source code and hardware schematic diagram. Common development boards include 51, ARM, FPGA, and DSP...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F30/347
Inventor 张吉锋李川李海宏
Owner S2C
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products