Heterogeneous neural network calculation accelerator design method based on FPGA

Abstract

The invention belongs to the technical field of computers. The invention provides an FPGA-based heterogeneous neural network calculation accelerator design method, which is suitable for large-scale deep neural network algorithm acceleration. The method comprises the following steps that: a CPU reads related parameters of a neural network, and dynamically configures an external memory and a convolution calculation unit according to obtained information; an external memory stores parameters and input data which need to be loaded into corresponding positions of an input cache through a bus; the parameters are alternately loaded into the two convolution calculation units respectively, the other convolution calculation unit performs calculation while the parameters are loaded into one convolution calculation unit, and circularly alternating is conducted until all operations of the whole convolution neural network are completed; and final output results are stored in an output cache to waitfor an external memory to access. According to the method, the FPGA is used for combining the convolutional neural network calculation units, so a computing rate of a platform can be increased while resources are saved.

Description

technical field [0001] The invention belongs to the technical field of computers, and in particular relates to a design method of an FPGA-based heterogeneous neural network computing accelerator. Background technique [0002] Deep learning is an important area of ​​artificial intelligence, mainly used to study the algorithm, theory and application of neural networks. Since Hinton et al. proposed the concept of deep learning in 2006, it has made extraordinary achievements in natural language processing, image processing, speech processing and many other areas, and has received great attention. Although it has powerful data analysis and prediction capabilities, deep learning still faces the problem of a large amount of calculation, so the construction of an efficient deep learning platform is becoming more and more important. [0003] FPGA (Field Programmable Gate Arrays), Field Programmable Gate Array, is the product of further development on the basis of PAL, GAL, CPLD and ...

AI Technical Summary

Problems solved by technology

However, due to the reuse of the convolutional neural network computing module, this method needs to reload the required parameters from the memory before computing each layer, which undoubtedly takes a lot of time for parameter loading, which greatly improves the efficiency of the entire network calculation. reduce

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