3D memory device and manufacturing method thereof

Abstract

The application discloses a 3D storage device and a manufacturing method thereof. The manufacturing method of the 3D storage device includes: a substrate; a stacked gate structure on the substrate, the stacked gate structure includes a plurality of gate conductors and a plurality of interlayer insulating layers stacked alternately; channel pillars; and a plurality of dummy channel pillars running through the gate stack structure, wherein the material of the dummy channel pillars is a dielectric material. The 3D storage device adopts a dielectric material to form a false channel column, which avoids the leakage problem at the bottom of the false channel column, and improves the yield rate and reliability of the 3D storage device.

Description

technical field [0001] The present invention relates to memory technology, and more specifically, to a 3D memory device and a manufacturing method thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared...

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Problems solved by technology

In the prior art, when the trench pillar structure and the dummy trench pillar structure are formed, the height deviation between the trench pillar and the dummy trench pillar is large, and the critical dimension (CD) of the dummy trench pillar is larger than that of the trench pillar. Therefore, the epitaxial layer (Selctive Epitaxial Growth, SEG) formed at the bottom of the false channel column is relatively thin, and it is easy to be short-circuited with the conductive layer in the substrate due to over-etching during the process, resulting in leakage or even damage to the device

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