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Silicon heterojunction solar cell and emitter thereof, and preparation method of emitter

A solar cell and silicon heterojunction technology, applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problem of reducing the hole collection efficiency of solar cells and achieve the effect of improving conversion efficiency

Pending Publication Date: 2020-07-03
德运创鑫(北京)科技有限公司
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  • Application Information

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Problems solved by technology

[0004] The emitter of the existing n-type silicon heterojunction solar cell has a high Schottky barrier to holes at the interface between the TCO layer and the p-type silicon doped layer, so the holes in the n-type silicon substrate need to cross the Schottky barrier. The base barrier can be collected by the solar cell, which reduces the collection efficiency of the solar cell for holes

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  • Silicon heterojunction solar cell and emitter thereof, and preparation method of emitter
  • Silicon heterojunction solar cell and emitter thereof, and preparation method of emitter
  • Silicon heterojunction solar cell and emitter thereof, and preparation method of emitter

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Embodiment Construction

[0057] In order to make the purpose, technical solution and advantages of the application clearer, the embodiments of the application will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

[0058] In the present application, "more layers" means two or more layers, and "more kinds" means two or more layers, unless otherwise specifically defined.

[0059] The embodiment of the present application provides a silicon heterojunction solar cell emitter, such as figure 1 As shown, the emitter includes:

[0060] An n-type silicon substrate 1, the n-type silicon substrate 1 has an emitter surface;

[0061] a first intrinsic passivation layer 2 formed on the emitter surface;

[0062] a p-type silicon doped layer 3 formed on the first intrinsic passivation layer 2; and

[0063] an ad...

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Abstract

The invention discloses a silicon heterojunction solar cell emitter, which comprises: an n-type silicon substrate having an emitter surface; a first intrinsic passivation layer formed on the emitter surface; a p-type silicon doped layer formed on the first intrinsic passivation layer; and an adsorption atom layer formed on the p-type silicon doped layer, wherein the adsorption atom layer comprisesadsorption atoms which are deposited on the surface of the p-type silicon doped layer and form a positive dipole moment potential field with the silicon atoms on the surface of the p-type silicon doped layer. The invention also discloses a preparation method of the silicon heterojunction solar cell emitter and a silicon heterojunction solar cell. The height of the Schottky barrier of the p-type silicon doped layer and the TCO interface of the emitter to the hole of the n-type silicon substrate is low, and the fill factor and the conversion efficiency of the silicon heterojunction solar cell are high.

Description

technical field [0001] The present application relates to but not limited to the field of photovoltaic technology, in particular to but not limited to a silicon heterojunction solar cell and its emitter and a method for preparing the emitter. Background technique [0002] Silicon heterojunction (SHJ) solar cells have been widely used in photovoltaic academia and industry in recent years because of their outstanding advantages such as high open circuit voltage, high conversion efficiency, low temperature coefficient, simple process flow, and no light-induced attenuation. Attention has become a popular development direction of high-efficiency solar cell technology. [0003] At present, the basic structure of n-type silicon heterojunction solar cells is: an intrinsic passivation layer is deposited on both sides of an n-type silicon substrate, a p-type silicon doped layer is deposited on the intrinsic passivation layer on one side, and a p-type silicon doped layer is deposited o...

Claims

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Application Information

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IPC IPC(8): H01L31/0747H01L31/0352H01L31/20
CPCH01L31/035272H01L31/0747H01L31/202H01L31/204Y02E10/50Y02P70/50
Inventor 龙巍
Owner 德运创鑫(北京)科技有限公司
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