Preparation method of JFET device, JFET device and layout structure of JFET device

Abstract

The invention discloses a preparation method of a JFET device, the JFET device and a layout structure of the JFET device, and the method comprises: providing a substrate, forming a deep N-type trap inthe substrate, and forming a field oxide layer on the substrate; forming a P-type well in the substrate, wherein the P-type well is overlapped with the bottom of the field oxide layer; forming a first gate field plate, a second gate field plate and a third gate field plate on the field oxide layer; forming a first P-type heavily doped region and a second P-type heavily doped region in the substrate; and forming a first N-type heavily doped region, a second N-type heavily doped region and a third N-type heavily doped region in the substrate. In the process of preparing the JFET device, the P-type trap expands towards the drain electrode and wraps part of the area at the bottom of the field oxide layer, so that the electric field intensity of the field oxide layer close to the first grid electrode is reduced, the breakdown risk after the field oxide layer is thinned is reduced to a certain extent, and the reliability of the JFET device is improved.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, in particular to a preparation method of a JFET device, a JFET device and a layout structure thereof. Background technique [0002] Junction Field-Effect Transistor (JFET) is a three-terminal active device with amplification function composed of Gate, Source and Drain of PN junction. Its working principle is to control the output current by changing the conductivity of the channel through the voltage. [0003] The BCD (Bipolar-CMOS-DMOS) process is a process for fabricating bipolar transistor (BipolarJunction Transistor, BJT) devices, complementary metal-oxide semiconductor (Complementary Metal-Oxide Semiconductor, CMOS) devices and DMOS devices on the same chip (Die). Devices manufactured by BCD process are widely used in power management, display drive, automotive electronics, industrial control and other fields. [0004] refer to figure 1 , which shows a schema...

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Problems solved by technology

[0007] The present application provides a preparation method of a JFET device, a JFET device and its layout structure, which can solve the problem that the JFET device provided in the related art is prone to voltage breakdown after the gate oxide layer is thinned

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