FPGA-based Yolov3 network computing acceleration system and acceleration method thereof
A technology for accelerating systems and networks, applied in computing, energy-saving computing, computer components and other directions, can solve the problems of difficult to deploy embedded terminals, large amount of calculation, etc., to achieve the effect of increasing bandwidth, getting rid of bandwidth limitations, and improving detection speed
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[0056] according to figure 1 Shown, a kind of Yolov3 network computing acceleration system based on FPGA, described system comprises ARM and FPGA platform framework, off-chip memory area, AXI_M interface and AXI_S interface, described ARM platform framework comprises core processor and data and memory controller , the FPGA platform architecture includes an acceleration core unit, an input buffer end and an output buffer end;
[0057] The core processor includes an ARM Cortex-A53CPU and an L2 cache area, the off-chip storage area includes an SD card and external DDR4, and the acceleration core unit includes a data matrix vector array and a computing module;
[0058] The ARM Cortex-A53CPU is connected to the L2 cache area, the L2 cache area is connected to the data and the memory controller, the data and the memory controller are connected to the off-chip storage area, the data and the memory controller AXI_M interface and the AXI_S interface, the The AXI_S interface is connect...
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