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A Method for Reducing Image Processing Power Consumption in Embedded Platform

An embedded processor and image processing technology, applied in image communication, by changing the field conversion of the input video signal, color TV components, etc., can solve the problems of high cost, complex hardware programming, and high power consumption of FPGA chips. Achieve the effect of low engineering difficulty and low power consumption

Active Publication Date: 2021-04-27
NANJING LES ELECTRONICS EQUIP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the interface types of embedded chips have certain limitations. At present, many embedded chips used in the field of image processing have MIPI interfaces, and the conversion from Cameralink interfaces to MIPI interfaces is still a pain point in the industry. The mainstream design idea is usually to use FPGA to do Interface conversion, this method is complex in hardware programming and high in cost when configuring the video parameters of the MIPI interface, and the power consumption of the FPGA chip itself is high, which is not suitable for application scenarios with demanding power consumption

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  • A Method for Reducing Image Processing Power Consumption in Embedded Platform

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Embodiment Construction

[0033] combine figure 1 As shown, according to an embodiment of the present invention, a kind of low power consumption method that realizes image processing through the mutual conversion of Cameralink interface and MIPI interface comprises the following steps:

[0034] 1. Cameralink to MIPI-CSI conversion

[0035] Step 1, convert the image data input by the image source through the Cameralink interface into MIPI-CSI image data through the Cameralink to MIPI-CSI conversion unit, specifically:

[0036] The image data input by the image source through the Cameralink interface is high-speed serial data, including 5 pairs of differential signal lines, of which 4 pairs are video data lines and 1 pair is a synchronous clock signal. Receive decoder (typical chip DS90CR288A) through LVDS 28-bit channel to decode 1.8V or 3.3V parallel data, where 28-bit parallel data includes 24-bit image data and 4-bit video control signal.

[0037] Step 2, convert the parallel data (intermediate data)...

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Abstract

The invention provides a method for reducing image processing power consumption on an embedded platform, comprising: 1) converting Cameralink image data into parallel port data by using an LVDS decoding chip; 2) converting parallel port data into MIPI-CSI data by using a bridge chip; 3) Image processing is performed on the data and the output is MIPI-DSI data; 4) The bridge chip is used to convert the MIPI-DSI data into parallel port data; 5) The LVDS encoding chip is used to convert the parallel port data into Cameralink image data. The invention provides a low power consumption and low-cost implementation method for performing flexible image processing on Cameralink image data on embedded platforms such as ARM. At present, the conversion from Cameralink interface to MIPI interface is still a pain point in the industry, and there is no conversion method with the characteristics of low power consumption and easy development. The present invention solves this difficulty.

Description

technical field [0001] The invention relates to the application field of a dedicated image platform, in particular to a method for reducing power consumption of image processing on an embedded platform. Background technique [0002] The Cameralink protocol is a serial communication protocol specifically for machine vision applications, which uses low-voltage differential signaling (LVDS) for data transmission and communication. The Cameralink interface is the video data interface in the physical layer of the Cameralink transmission protocol. The video data interface mainly includes 5 pairs of differential signals, of which 4 pairs are video data and 1 pair is synchronous clock signal. The sending end of the video data part converts the 28-bit parallel data signal into 4 pairs of differential signals according to 7:1, wherein the 28-bit parallel data includes 24-bit image data and 4-bit video control signal. [0003] Portable or handheld optoelectronic devices in military e...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/232H04N5/765H04N7/01
CPCH04N5/765H04N7/0117H04N7/0127H04N23/80
Inventor 杜瀚宇王笛颜世博翟尚礼朱伟苗锋
Owner NANJING LES ELECTRONICS EQUIP CO LTD