Semiconductor device and manufacturing method thereof

Abstract

The embodiment of the invention provides a semiconductor device and a manufacturing method thereof. The manufacturing method of the semiconductor device comprises the following steps of forming a first dielectric layer and a plurality of first conductive structures on a substrate, wherein the first dielectric layer is positioned among a plurality of first conductive structures; the manufacturing method of the semiconductor device further includes forming trenches in the first dielectric layer and between a plurality of first conductive structures. The method of manufacturing the semiconductordevice further includes forming a pad material on sidewalls and a bottom of the trench, and forming a conductive plug on the pad material in the trench. The method of manufacturing the semiconductor device further includes removing the pad material to form an air gap, wherein the air gap is located between the conductive plug and the first dielectric layer. The manufacturing method is advantaged in that parasitic capacitance of the bit line can be effectively reduced, and a good capacitance amplification signal is further maintained.

Description

technical field [0001] The present invention relates to a semiconductor device and a manufacturing method thereof, in particular to a semiconductor device applied to a dynamic random access memory (DRAM) and a manufacturing method thereof. Background technique [0002] In the current random access memory (DRAM) structure, capacitors are bridged by capacitor contacts, and the bit lines are arranged close to the capacitor contacts. There are many factors affecting the parasitic capacitance of the bit line, but it mainly comes from the bit line-capacitor contact parasitic capacitance (BL-CC capacitance) between the bit line and the capacitor contact. However, as the size of the manufacturing process continues to shrink, the distance between the bit line and the capacitive contact in the random access memory becomes shorter and shorter, and as the capacity requirement of the random access memory increases, the length of the bit line Also getting longer. All of these will incre...

AI Technical Summary

Problems solved by technology

However, as the size of the manufacturing process continues to shrink, the distance between the bit line and the capacitive contact in the random access memory becomes shorter and shorter, and as the capacity requirement of the random access memory increases, the length of the bit line also getting longer

These will lead to an increase in the parasitic capacitance of the bit line, which in turn reduces the capacitance of the amplified signal

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