High-reliability clock synchronization system and method for time sensitive network

A time-sensitive, clock synchronization technology, applied in the field of communication, can solve the problems of not realizing clock frequency synchronization, unable to correct frequency offset in real time, and not considering the change of crystal frequency, so as to solve the problem of low clock offset correction accuracy and improve Network fault tolerance and reliability, addressing the effects of slow frequency offset correction

Active Publication Date: 2020-08-25
SHANGHAI JIAO TONG UNIV
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Problems solved by technology

[0007] The global clock reference in IEEE 802.1AS relies heavily on GM. If the GM clock deviates greatly, the clock of the entire network will have a large error. Although the best master clock algorithm can be used to adjust the GM, it is necessary to compare all network devices When the network scale is large, the switching speed will be slow, and if the selected GM clock frequency is far from UTC, the error will continue to accumulate and increase
[0008] AS6802 lacks the function of synchronizing with UTC and can only achieve clock synchronization within the local area network. At the same time, AS6802 may have clumping phenomenon, which makes it impossible to achieve global clock synchronization. Although the clumping detection mechanism is introduced, it will also increase the complexity of the algorithm
[0009] Both IEEE 802.1AS and AS6802 only consider instantaneous time synchronization, and do not consider the change of crystal oscillator frequency, that is, the above-mentioned clock synchronization is only time synchronization, and does not realize clock frequency synchronization, and cannot correct clock frequency offset
When the frequency offset is large, under the same clock synchronization accuracy requirements, a shorter synchronization period is required, and the synchronization frequency is higher, which will occupy a large amount of network bandwidth and increase network load; if the same synchronization period is used, the synchronization accuracy will decrease
[0010] At present, some methods that consider clock offset correction and frequency offset correction at the same time only consider the frequency offset correction of independent devices, such as only considering the influence of temperature on the clock frequency on a single device and compensating; some methods use master-slave Frequency synchronization, the frequency of the slave clock is only related to the frequency of the upper-level master clock, so that frequency offset correction errors will continue to accumulate in large networks
[0011] Existing methods that consider frequency offset correction alone generally require a long period of time to collect data and then perform offline calculations, resulting in longer synchronization time and unable to perform real-time correction of frequency offset

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[0055] The following describes several preferred embodiments of the present invention with reference to the accompanying drawings, so as to make the technical content clearer and easier to understand. The present invention can be embodied in many different forms of embodiments, and the protection scope of the present invention is not limited to the embodiments mentioned herein.

[0056] In the drawings, components with the same structure are denoted by the same numerals, and components with similar structures or functions are denoted by similar numerals. The size and thickness of each component shown in the drawings are shown arbitrarily, and the present invention does not limit the size and thickness of each component. In order to make the illustration clearer, the thickness of parts is appropriately exaggerated in some places in the drawings.

[0057] figure 1 It is a network structure diagram of a clock synchronization network in a preferred embodiment of the present inve...

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Abstract

The invention discloses a high-reliability clock synchronization system and method for a time sensitive network, and relates to the technical field of communication. The network is divided into two levels according to a clock synchronization function, a master-slave synchronization method is adopted for a top-layer network to achieve time and frequency offset correction, the time and frequency offset is compared with a bottom-layer network clock reference in order that the network reliability is guaranteed; and the bottom-layer network adopts a distributed structure to realize calculation release and frequency release of the time reference. According to the invention, the dependence of the network clock reference on the GM is reduced, and the fault tolerance and reliability are improved; roles of all devices in the network are dynamically distributed so that the agglomeration phenomenon is avoided, and clock synchronization of all network devices is achieved; time and frequency offsetcorrection is considered at the same time, synchronization of a network system clock and UTC in time and frequency is achieved, the problems that in a traditional clock synchronization method, time offset correction precision is not high, and frequency offset correction is slow are effectively solved, namely synchronization precision is improved, and synchronization speed is increased.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a highly reliable clock synchronization system and method for time-sensitive networks. Background technique [0002] Time Sensitive Networking (TSN) is an emerging network that can provide deterministic services for modern industries and is an extension of traditional Ethernet. TSN establishes a "universal" time-sensitive mechanism for traditional Ethernet protocols, ensuring the time determinism of network data transmission. [0003] The key link in building TSN is to design the TSN gateway, and an important foundation of TSN is precise clock synchronization, so the TSN gateway needs to achieve precise clock synchronization. Clock synchronization provides uniform and accurate time for all devices in TSN, which is the basis for TSN to work normally. Without precise clock synchronization, TSN will not be able to accurately control the opening and closing of the gates in t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/06
CPCH04J3/0638
Inventor 许齐敏俞运柱陈彩莲陈相吴开杰关新平
Owner SHANGHAI JIAO TONG UNIV
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