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A ldmos device with multiple trenches

A trench and device technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of uneven doping in the RESURF region, reduced device breakdown voltage, and large drift region area, so as to optimize the electric field. effect of distribution, improvement of on-resistance, and increase of reverse blocking voltage

Active Publication Date: 2021-08-24
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, although this RESURF structure can ensure that the device has a high withstand voltage and improve the compromise relationship between the device withstand voltage and the on-state resistance, it occupies too much area in the drift region, making the entire device area larger, and its original RESURF The doping of the region is relatively uneven, and the distribution of the lateral electric field lines in the original drift region is difficult to approach the ideal trapezoidal distribution, thereby reducing the breakdown voltage of the device and affecting the performance of the device

Method used

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  • A ldmos device with multiple trenches
  • A ldmos device with multiple trenches
  • A ldmos device with multiple trenches

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Embodiment Construction

[0024] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0025] Such as figure 2 As shown, the LDMOS device with multiple trenches provided by the first embodiment of the present invention includes a second conductivity type substrate 201, a first conductivity type drift region 202, a second conductivity type body region 203, a highly doped third The second conductivity type body contact region 204, the first conductivity type source region 205, the first conductivity type drain region 206, the dielectric layer 208, the source electrode 209, the planar gate structure and the drain electrode 211;

[0026] The drift region 202 of the first conductivity type is located on the substrate 201 of the second conductivity type; the body region 203 of the second conductivity type ...

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Abstract

The invention relates to an LDMOS device with multiple grooves, belonging to the technical field of power semiconductors. The present invention provides an LDMOS device with multiple trenches, which changes the morphology of the diffusion region of the second conductivity type by trench etching to realize evenly distributed doping, so as to optimize the electric field distribution on the surface and reduce the drift region In addition, the morphology of the junctions on both sides is improved, the reverse blocking voltage of the device is improved, and the on-resistance can be improved at the same time.

Description

technical field [0001] The invention belongs to the technical field of power semiconductors, in particular to an LDMOS device with multiple grooves. Background technique [0002] LDMOS transistors are one of the most widely used devices in smart power integrated circuits. Among many power devices, LDMOS, as the core device of power integrated circuits, has become the research object of many scholars at home and abroad because of its simple design, easy integration, superior frequency, switching characteristics and many other advantages. However, the serious contradictory relationship between breakdown voltage and specific on-resistance in lateral high-voltage power devices has always limited the application of LDMOS at high voltage and high current. Therefore, designing an LDMOS that can meet a certain withstand voltage requirement and has a low specific on-resistance is an important development direction of power semiconductor technology at present. [0003] The tradition...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L29/78H01L21/336
CPCH01L29/0623H01L29/0684H01L29/66681H01L29/7823
Inventor 李泽宏王志明程然蒲小庆胡汶金任敏张金平高巍张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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