Circuit for preventing overshoot of output voltage of low dropout regulator
A technology with low dropout linearity and output voltage, which is applied in the direction of instruments, regulating electric variables, control/regulation systems, etc., and can solve the problems of large volume and low integrated circuit integration
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[0035] figure 1Shown is a schematic circuit diagram of a traditional LDO according to an embodiment of the present invention, which includes an operational amplifier A, a power supply voltage VDD, a capacitor C1, a power transistor (Pass Device), voltage dividing resistors R1 and R2, an output capacitor Cout, and an equivalent series resistor (ESR). In the figure, the reference voltage Vref is used as the non-inverting input of the operational amplifier A, and the output terminal of the operational amplifier is connected to the grid of the power tube; the source of the power tube is connected to the power supply voltage, the drain of the power tube is grounded through the series resistors R1 and R2, and the drain voltage of the power tube is That is, the output voltage Vout of the LDO, Vout is reversely input to the operational amplifier through the resistor R1; the capacitor C1 is respectively connected to the gate and drain of the power tube; ESR and Cout are connected in se...
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