Data Accelerated Operation Processing Method, Device, and Computer-Readable Storage Medium

Abstract

The application discloses a data acceleration operation processing method, device and computer-readable storage medium. Wherein, the method includes that the storage server utilizes the memory management module to pre-apply for the input cache space and the output cache space, and at the same time transmits the start address of each memory page of the input cache space and the output cache space to the direct memory access descriptor table, and the input cache The space stores the IO raw data corresponding to the user data request, and the output cache space stores the data processing results after the IO raw data is accelerated. After receiving the data acceleration operation request, the FPGA accelerator card moves the IO raw data from the input buffer space to the local area for accelerated operation processing through the direct memory access descriptor table, and moves the data processing result to the The output cache space can avoid memory copy while using the FPGA accelerator card to process data on the storage server, effectively reducing the performance loss of the storage server during the acceleration process.

Description

technical field [0001] The present application relates to the technical field of data reading and writing, and in particular to a data acceleration operation processing method, device and computer-readable storage medium. Background technique [0002] With the trend of big data and cloud computing, the importance of data storage has become increasingly prominent. From the current point of view, all-flash products are an inevitable trend in the development of storage systems. With the rapid development of SSD (Solid State Drives, solid state drive) technology, more and more SSDs are used in storage systems, but the price of SSDs remains high. How to use limited SSD space to store more data content, compression and deduplication are important features of all-flash storage. Features such as deduplication and compression consume too much CPU, and inevitably involve memory copy operations, which need to be implemented with the help of an FPGA accelerator card. [0003] When th...

AI Technical Summary

Problems solved by technology

However, features such as deduplication and compression consume too much CPU, and inevitably involve memory copy operations, which need to be implemented with the help of an FPGA accelerator card.

[0003] When the storage server calls the FPGA accelerator card for data compression and data deduplication, it needs to apply for a large storage space in advance to copy the user IO request and its data from the original storage location to the storage space, and then the FPGA accelerator card Read data from this storage space for processing. After processing, the FPGA accelerator card will send the processing results back to another storage space in the storage server, and the storage server will copy the data processing results back to the original storage location. The entire data The processing process involves multiple data copies, and the memory copy needs to consume a lot of CPU (Central Processing Unit, central processing unit) resources

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