SSD low-power-consumption implementation method and device, computer equipment and storage medium

Abstract

The invention relates to an SSD low-power-consumption implementation method and device, computer equipment and a storage medium. The method comprises the following steps: obtaining a state switching instruction of a host; analyzing and identifying the state switching instruction; if the state switching instruction is an instruction for entering low power consumption, writing the data of the SSD and the firmware program into a DRAM of a host through a PCIe bus; controlling the SSD to enter a sleep mode; if the state switching instruction is a low power consumption quitting instruction, controlling the SSD to quit the sleep mode, and initializing a DRAM and an NAND of the SSD; and reading data and firmware programs of the SSD back from the DRAM of the host through the PCIe bus. Firmware programs and data in the DRAM and the SOC of the SSD are stored in the DRAM of the host through the PCIe bus; by utilizing the advantages of low delay and high bandwidth of the DRAM of the host, the timeconsumed for the SSD to enter / exit from the low-power-consumption state is very short, the command response delay of the SSD command during switching of the dormant state is greatly shortened, and theaverage power consumption of the SSD is reduced.

Description

technical field [0001] The present invention relates to the field of SSD power consumption control, and more specifically refers to a method, device, computer equipment and storage medium for realizing low power consumption of SSD. Background technique [0002] SSD (Solid State Disk or Solid State Drive), also known as solid state drive. As a new type of storage medium, SSD uses NAND (computer flash memory device) particles as data storage. Compared with traditional HDD (Hard DiskDrive, hard disk drive), it has the advantages of high performance and low latency, but its power consumption also increases accordingly. In order to reduce power consumption, when the SSD enters low power consumption, it is necessary to turn off the power of related devices or lower the device voltage, such as turning off the voltage of DRAM (Dynamic Random Access Memory, dynamic random access memory) and NAND, and reducing the SOC (System On Chip, chip-level system) core voltage, etc., but then i...

AI Technical Summary

Problems solved by technology

[0004] The existing solutions have the following problems: 1. The firmware is loaded in a Block (block) of NAND, which represents serial loading of data, and its processing performance is very low, and it takes a long time; It is non-continuous, its performance is only 1 / 3 of the peak value, and it consumes more time to restore data virtually

Therefore, the entire process of SSD entering and exiting low power consumption, the time overhead caused by saving and restoring data, and the inability to respond to commands during data restoration will lead to increased IO response delay and average power consumption.

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