PLB-AXI bus conversion bridge and working method thereof

Abstract

The invention discloses a PLB-AXI bus conversion bridge and a working method thereof. PLB slave interface units divide PLB access protocol interfaces and are used for processing PLB interface signals;the protocol conversion control unit is used for realizing complete conversion from a PLB protocol to an AXI protocol; the AXI main interface unit is used for dividing AXI access protocol interfacesand processing AXI interface signals; the register unit is used for registering working state information in the protocol conversion control unit and sending the working state information to the DCR interface; and the exception processing unit is used for processing the abnormal work information in the protocol conversion control unit and sending the abnormal work information to the exception / interruption interface. By adopting a two-stage pipelined protocol rapid conversion strategy and a cache strategy for avoiding multi-access congestion, an access command initiated by a PLB bus is converted into an AXI bus access command where slave equipment is located, protocol communication of two high-speed buses is achieved, the communication efficiency in the system is improved, and the system reliability is improved. The problem of efficient and high-reliability conversion from high-speed PLB bus access to AXI bus access in an embedded system and an SoC system is solved.

Description

technical field [0001] The invention belongs to the technical field of embedded system and integrated circuit design, and in particular relates to a PLB-AXI bus conversion bridge and a working method thereof. Background technique [0002] The design of ultra-large-scale high-performance SoC is inseparable from the on-chip high-speed interconnection bus system (Bus System). The current mainstream on-chip high-speed interconnection bus is represented by the AMBA (Advanced Microcontroller Bus Architecture) bus architecture represented by ARM Corporation and IBM Corporation. CoreConnect bus specification, etc. The AXI (AdancedeXtensible Interface) bus protocol is the most important part of the AMBA3.0 protocol. It is widely used in the field of SoC design because of its high performance, high bandwidth, and low latency. PLB (Processor Local Bus) and DCR bus (Device Control Register) are different bus protocols under the CoreConnect bus specification. The PLB bus has the charact...

AI Technical Summary

Problems solved by technology

[0003] At present, the mainstream conversion control structure design is typically based on the two bus conversion bridges, which fail to consider the high-speed and random nature of the access initiated by the PLB bus in the structure. If there are multiple access requests in a short time window, due to the conversion It takes a certain amount of time for the bridge to complete a conversion. Therefore, while ensuring the correct conversion, it is also necessary to ensure the reliability of the conversion, solve the problem of access congestion, and not lose access requests. The bridge does not have such functions for the time being.

At the same time, the bridge has not considered how to improve the conversion efficiency, and the internal components for implementing protocol conversion are not clear

[0004] At present, the existing conversion structure fails to consider such problems, and reflects the lack of corresponding technologies at different levels. After searching the relevant literature, there is no good solution to this problem.

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