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Electrostatic induction damage test method for chip

A technology of electrostatic induction and testing method, which is applied in the direction of electronic circuit testing, measuring electricity, measuring devices, etc., and can solve problems such as damage tolerance

Pending Publication Date: 2020-12-25
BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, there will be electrostatic induction discharge in each stage of chip production, packaging and actual use. It is not enough to conduct electrostatic induction discharge test on the final form of the chip, which cannot fully reflect the electrostatic induction damage resistance of the product in each stage of production and use. Force

Method used

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  • Electrostatic induction damage test method for chip
  • Electrostatic induction damage test method for chip
  • Electrostatic induction damage test method for chip

Examples

Experimental program
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Embodiment Construction

[0012] as attached figure 1 As shown, the tested chip in the final product form is placed on the stainless steel workbench 3, and the chip metal layer 6 faces the stainless steel workbench 3, ensuring that the chip substrate metal sheet 2 faces the tip of the electrostatic electron gun. Use the round head of the system-level electrostatic gun 1 to contact the metal sheet 2 on the back of the substrate of the chip under test in the final product form with +10,000 V to +30,000 V to discharge, because the chip device layer 7 is separated by the adhesive 8, chip The substrate 9 will not generate direct contact discharge to the chip. When discharging, a sharply changing electric field will be generated between the metal sheet 2 on the back of the substrate and the stainless steel workbench 3, and the electric field will pass through the chip device layer 7. When the electric field is strong enough, it will cause damage to the chip device, which is for the chip substrate. Electrost...

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PUM

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Abstract

The invention provides an electrostatic induction damage test method for a chip. During an electrostatic induction damage test, a substrate of the tested chip faces a gun head of an electrostatic electron gun, so that an electrostatic field generated during the electrostatic induction damage test is ensured to penetrate through a chip device layer. When the outermost surface of the substrate of the tested chip is covered with a metal sheet, the gun head of the electrostatic electron gun is in direct contact with the metal sheet for a discharge test; when the outermost surface of the substrateof the tested chip is covered with an insulating layer, the gun head of the electrostatic electron gun is in direct contact with the insulating layer for the discharge test; when the insulating layeroutside the substrate of the tested chip is removed and a patch adhesive is exposed, the gun head of the electrostatic electron gun is in direct contact with the patch adhesive for the discharge test;and when the back surface of the tested chip is completely exposed out of the substrate, the gun head of the electrostatic electron gun is in direct contact with the substrate of the chip for the discharge test.

Description

technical field [0001] The invention relates to a chip static induction damage test method. Background technique [0002] The electrostatic test and evaluation test models of the chip include the human body discharge model (HBM), the machine model (MM), the charging device model (CDM) and the induction discharge model (FICDM). The four test models are all contact electrostatic tests for the chip pins. . In addition to contact electrostatic discharge damage, the chip will also be damaged by electrostatic induction. Therefore, it is also necessary to conduct an electrostatic induction damage test on the chip to evaluate the chip's resistance to electrostatic induction damage. Generally, when carrying out the electrostatic induction damage evaluation test, the difference test will be carried out according to the size of the final form of the chip. The final form of the chip is relatively small in size, and the air discharge test is directly carried out on the final form of the...

Claims

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Application Information

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IPC IPC(8): G01R31/00G01R31/28
CPCG01R31/002G01R31/2851
Inventor 杨利华
Owner BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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