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Forming method of semiconductor structure

A semiconductor and graphic technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of etching load effect, uneven fins, uneven graphics, etc.

Active Publication Date: 2020-12-29
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the etching load effect is prone to occur when forming fins with different densities in the existing process, resulting in problems such as uneven fins and uneven patterns.

Method used

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  • Forming method of semiconductor structure
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  • Forming method of semiconductor structure

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no. 1 example

[0035] Figure 7 to Figure 16 It is a structural schematic diagram of the formation process of the semiconductor structure in the first embodiment of the present invention.

[0036] first reference Figure 7 , a substrate 100 is provided, and the substrate 100 includes a device-dense region and a device-sparse region.

[0037] In this embodiment, the material of the substrate 100 is silicon; in other embodiments, the substrate 100 may also be semiconductor materials such as germanium, silicon germanium, and gallium arsenide.

[0038] continue to refer Figure 7 , forming a first mask layer 200 on the substrate 100 ; forming a first core layer 300 on the first mask layer; and forming a second mask layer 400 on the first core layer 300 .

[0039]In this embodiment, the material of the first core layer 300 is amorphous silicon; in other embodiments, the first core layer 300 may also be silicon dioxide, silicon nitride or silicon carbide. .

[0040] The method for forming the...

no. 2 example

[0079] Figure 17 to Figure 21 It is a structural schematic diagram during the formation of the semiconductor structure in the second embodiment of the present invention.

[0080] In this embodiment, the process of providing the substrate 100 and forming the first mask layer 200 , the first core layer 300 and the second mask layer 400 is the same as that of the first embodiment, and will not be repeated here.

[0081] first reference Figure 17 , forming a second core layer 600 on the second mask layer 400 before forming the fin spacing pattern in a discrete arrangement.

[0082] In this embodiment, the material of the second core layer 600 is photoresist; in other embodiments, the material of the second core layer 600 may also be amorphous silicon.

[0083] In this embodiment, the process for forming the second core layer 600 is the same as the process for forming the first core layer 300 in the first embodiment.

[0084] refer to Figure 18 and etching the second core la...

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Abstract

The invention provides a method for forming a semiconductor structure. The method comprises the following steps of providing a substrate comprising a device dense region and a device sparse region; sequentially forming a first mask layer, a first core layer and a second mask layer on the substrate; etching the second mask layer and the first core layer to form a fin interval pattern; forming a first sacrificial layer in the device sparse region, wherein the first sacrificial layer covers the fin interval pattern; etching to reduce the width of the first core layer of the device dense region bytaking the first sacrificial layer as a mask; forming a second sacrificial layer in the device dense region; etching to remove the first sacrificial layer, the second sacrificial layer and the secondmask layer, and remaining the first core layer; forming first side walls on two sides of the first core layer; removing the first core layer; etching the first mask layer by taking the first side wall as a mask to form a first mask layer pattern; and etching the substrate by taking the first mask layer pattern as a mask to form a fin part. According to the forming method, fin patterns with different intervals can be obtained, and the patterns are consistent in height and good in uniformity.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the rapid development of semiconductor technology, semiconductor devices have undergone a transformation from planar MOSFET transistors to three-dimensional transistors, such as Fin Field Effect Transistors (FinFETs). In order to improve the integration of semiconductor devices, the feature size of fins (Fin) is continuously reduced, and double patterning technology is currently the key technology for realizing smaller-sized patterns, such as self-aligned double patterning technology (SADP). [0003] At present, in the manufacturing process of semiconductor devices, according to the actual layout design, the pattern density of each region of the substrate is not completely the same, and the pitch of adjacent fins is also not completely the same. However, the etching load effect is prone ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8234H01L21/033
CPCH01L21/823431H01L21/0332
Inventor 孙天杨
Owner SEMICON MFG INT (SHANGHAI) CORP