Anti-single event upset system and method

Abstract

The invention discloses a single event upset resisting system and method. The system comprises an industrial-grade FPGA, an industrial-grade processing chip, an industrial-grade watchdog circuit, a set of industrial-grade SPI FLASH storage chips and two sets of OTP PROM storage chips. The method comprises the following steps that the industrial watchdog circuit monitors the running state of the industrial FPGA by receiving a dog feeding signal output by the industrial FPGA, and controls the industrial FPGA to reset and restart when the running state of the industrial FPGA is abnormal; an internal watchdog circuit arranged in the industrial-grade FPGA monitors the operation state of the industrial-grade processing chip by receiving a dog feeding signal output by the industrial-grade processing chip, and controls the industrial-grade processing chip to reset and restart when the operation state of the industrial-grade processing chip is abnormal. According to the method, the single eventupset and recovery conditions of the storage chip, the processing chip and the FPGA are considered, and the dependence on frequent erasing of the storage chip is reduced.

Description

technical field [0001] The application belongs to the technical field of anti-environmental radiation, and in particular relates to an anti-single-event upset system and method. Background technique [0002] It is well known that particle radiation from charged particles in the upper atmosphere and outer space can have serious effects on electronic devices. With the development of microelectronics technology, devices with small size, high density and low voltage are increasingly used in aerospace and other environmental radiation conditions. Researchers are paying more and more attention to the safety issues caused by the single event flipping effect. In order to combat the single event upset effect, various anti-single event upset systems have been designed and applied in different fields. At the same time, with the rapid development of commercial aerospace, the demand for low-cost, high-reliability anti-single event upset systems has gradually become prominent. [0003]...

AI Technical Summary

Problems solved by technology

However, general low-cost anti-single event upset systems use unreliable FLASH chips as key data storage chips, and there is no long-term reliable data source

Although multiple FLASH chips are used for redundant design, with the increase of chip capacity, chip wear, and the limitation of algorithm error correction capability, the possibility of simultaneous failure of redundant design will gradually increase

In the redundant backup scheme, after data error, it relies on the erase and write operation of FLASH to achieve correct data synchronization, and the erase operation itself wears out the memory chip and reduces the service life of the chip

At the same time, the general low-cost anti-single event upset system cannot guarantee the reliability of the industrial-grade chip itself added as a protection measure in the system design, and the system design itself lacks a reliable foundation

Images