Circuit devices, physical quantity measuring devices, electronic equipment, and moving objects

Abstract

To provide a circuit device, a physical quantity measuring device, an electronic device, and a mobile body capable of suppressing a decrease in measurement accuracy of time-to-digital conversion due to accumulation of clock jitter. The circuit device includes: a clock signal generation circuit, which generates a plurality of multi-phase clock signals; a time-to-digital conversion circuit, which performs a counting operation based on the i-th clock signal corresponding to the multi-phase clock signal, and obtains a signal corresponding to the first signal and the second clock signal. The count value corresponding to the time difference of the transition timing of the signal, and obtain the first digital value corresponding to the time difference of the transition timing of the jth clock signal corresponding to the first signal and the multi-phase clock signal, and also obtain the first digital value corresponding to the second signal and the multiphase clock signal A second digital value corresponding to the time difference of the transition timing of the kth clock signal corresponding to the multi-phase clock signal; and a processing circuit, which calculates a digital value corresponding to the time difference according to the count value, the first digital value and the second digital value .

Description

technical field [0001] The present invention relates to a circuit device, a physical quantity measuring device, electronic equipment, a mobile body, and the like. Background technique [0002] Conventionally, a time-to-digital conversion circuit for converting time into a digital value is known. The time-to-digital conversion circuit converts, for example, a time difference between transition timings of a first signal called a start signal and a second signal called a stop signal into a digital value. As a conventional example of such a time-to-digital conversion circuit, for example, the prior art disclosed in Patent Document 1 is known. The time-to-digital conversion circuit of Patent Document 1 performs time-to-digital conversion using the frequency difference of oscillation clock signals from two ring oscillation circuits as resolution. [0003] Patent Document 1: Japanese Patent Laid-Open No. 2019-39882 [0004] In the time-to-digital conversion using the frequency d...

AI Technical Summary

Problems solved by technology

Therefore, the jitter of the two oscillating clock signals is accumulated separately, and the measurement accuracy of the time-to-digital conversion may decrease due to this.

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