Power semiconductor device and manufacturing process thereof

Abstract

The invention relates to the technical field of power semiconductor devices, in particular to a power semiconductor device and a manufacturing process thereof. The manufacturing process of the power semiconductor device comprises the following steps of depositing an epitaxial layer on the front surface of a substrate and finishing the manufacturing of a front surface structure of the power semiconductor device; etching the back surface of the substrate to etch through the whole substrate until reaching the epitaxial layer to form a lead hole; and loading metal in the lead hole, forming a backmetal layer on the back surface of the substrate through cushion accumulation, annealing alloy, and leading the epitaxial layer to the back metal layer through a metal lead. According to the process,the substrate does not need to be thinned, and the back electrode is led out by adopting a lead hole technology. On the basis of not influencing the welding process and the electrical property of thepower semiconductor device, the thinning process is canceled, the substrate is reserved as a support, the fragmentation risk caused by the thinning process and the subsequent slice manufacturing process is avoided, and the cost is saved.

Description

technical field [0001] The present application relates to the technical field of power semiconductor devices, in particular, to a power semiconductor device and a manufacturing process thereof. Background technique [0002] In order to ensure the on-resistance or voltage drop of the chip, in the chip manufacturing process in the prior art, the back side of the wafer is thinned after the front side process is completed. With the continuous development of chip manufacturing technology, the thickness of the chip continues to decrease, and the thinner and thinner the chip thickness, the thinning process will cause damage to the wafer, resulting in abnormal problems such as wafer fragments and missing corners, which will bring more and more serious problems. Higher fragmentation rate, especially with the continuous increase of wafer size, the wafer fragmentation rate also rises linearly, resulting in a lot of waste of cost; in addition, the thinning process will cause changes in ...

AI Technical Summary

Problems solved by technology

With the continuous development of chip manufacturing technology, the thickness of the chip continues to decrease, and the thinner and thinner the chip thickness, the thinning process will cause damage to the wafer, resulting in abnormal problems such as wafer fragments and missing corners, which will bring more and more serious problems. Higher fragmentation rate, especially with the continuous increase of wafer size, the wafer fragmentation rate also rises linearly, resulting in a lot of waste of cost; in addition, the thinning process will cause changes in the stress of the wafer, and insufficient stress release will cause Lead to subsequent reliability problems in packaging, etc.

Images