Deep junction composite terminal structure of high-voltage power chip and preparation method thereof

Abstract

The invention discloses a deep junction composite terminal structure of a high-voltage power chip. The composite terminal structure comprises a lateral variable doping region, a junction terminal extension region and an SIPOS structure; thelateral variable doping region is a region formed by injecting aluminum ions under the shielding of a plurality of different gradient doping region windows andthen performing high-temperature diffusion; the junction termination extension region is arranged at the tail end of the lateral variable doping region (VLD) and is partially overlapped with the lateral variable doping region, and the junction termination extension region (JTE) is a region formed by diffusion of boron ions at a high temperature; and the SIPOS structure is arranged at the upper parts of the transverse variable doping region and the lateral variable doping region. According to the invention, the SIPOS structure covers thelateral variable doping region and the junction terminal extension region, so that the area of the terminal region is reduced, the terminal efficiency is improved, the influence of interface charges on the breakdown voltage of the terminal structure is reduced, and the 3.3 kV-level withstand voltage requirement is met in the presence of the interface charges.

Description

technical field [0001] The invention relates to the technical field of semiconductor device design, in particular to a deep-junction compound terminal structure of a high-voltage power chip and a preparation method thereof. Background technique [0002] The design of the terminal structure is one of the key technologies of semiconductor devices, which is closely related to the breakdown voltage of the device. [0003] When the semiconductor device is reverse-biased, the pn junction inside the device extends to the surface, making the peak electric field on the surface higher than that in the body, causing breakdown to occur on the surface. At the same time, when impact ionization occurs on the surface, the heat generated by the ionization process Carriers are easy to enter the passivation layer, forming fixed charges inside the passivation layer, changing the electric field distribution, making the device performance unstable and reliability reduced. Terminal technology is ...

AI Technical Summary

Problems solved by technology

At present, for power semiconductor devices, the structural design of the terminal area is mainly field ring structure, field plate plus field ring composite structure, etc. However, the field ring structure occupies a large chip area and is greatly affected by interface charges, and the field plate plus field ring composite structure Complex structure design

And for high-voltage deep-junction power devices, there is still the problem of curvature concentration at the end of VLD, and the structure of VLD and JTE is greatly affected by interface charges

Images