Flash memory device and method of manufacturing the same

Abstract

The present invention provides a flash memory device and a manufacturing method thereof. The material of the floating gate is replaced by at least one of amorphous silicon and single crystal silicon from traditional doped polysilicon at 530 degrees Celsius or 620 degrees Celsius, thereby solving the problem of There is a problem of filling voids in the floating gate, which makes it possible to continue shrinking the area of ​​the memory cell, and after the area of ​​the memory cell shrinks, the storage capacity can be improved and the reliability of the device can be guaranteed.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a flash memory device and a manufacturing method thereof. Background technique [0002] With the development of the Internet of Things technology, intelligent large-capacity and low-power consumption terminals have an increasingly strong demand for memory chip shrinkage, and the existing 55nm-65nm technology node code-type flash memory can achieve a reduction in memory cell area compared with 90nm technology. The node has a 50% increased storage capacity, but it is still difficult to meet the current demand for further shrinking the size of the memory chip and further increasing the storage capacity. [0003] In addition, for the traditional planar code flash memory, the area reduction of the memory array area and its peripheral logic circuit is the only way to further realize the memory chip miniaturization. Among them, the device size design of the logi...

AI Technical Summary

Problems solved by technology

[0002] With the development of the Internet of Things technology, intelligent large-capacity and low-power consumption terminals have an increasingly strong demand for memory chip shrinkage, and the existing 55nm-65nm technology node code-type flash memory can achieve a reduction in memory cell area compared with 90nm technology. The node has a 50% increased storage capacity, but it is still difficult to meet the current demand for further shrinking the size of the memory chip and further increasing the storage capacity

[0003] In addition, for the traditional planar code flash memory, the area reduction of the memory array area and its peripheral logic circuit is the only way to further realize the memory chip miniaturization. Among them, the device size design of the logic circuit area depends on the power supply voltage, memory cell Operating voltage, chip operating frequency, power consumption, chip performance, reliability and many other factors, the area design of each storage unit in the memory array area depends on the reliability of the chip, thus limiting the manufacturing of traditional planar code flash memory The miniaturization limit of the memory cell area manufactured by the process

Images