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CPU verification platform based on Systemverilog

A technology of verification platform and CPU module, applied in the field of CPU verification platform and functional verification of high-performance CPU, which can solve the problems of low CPU verification work efficiency, long verification period, and difficulty in guaranteeing correctness.

Active Publication Date: 2021-03-09
58TH RES INST OF CETC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to provide a CPU verification platform based on Systemverilog to solve the problems of extremely low efficiency of verification work of the current CPU, difficulty in ensuring correctness and long verification period

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  • CPU verification platform based on Systemverilog
  • CPU verification platform based on Systemverilog
  • CPU verification platform based on Systemverilog

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Embodiment 1

[0033] The invention provides a CPU verification platform based on Systemverilog, its structure is as follows figure 1As shown, it includes a verification use case generation module, an assembler module, a CPU module, a reference model module, a result comparison module, a reference model monitoring module, a CPU monitoring module, a program RAM and a data RAM; wherein, the verification use case generation module is used to generate The assembly verification use case required by the CPU module, the verification use case generation module is an automated script written in Perl language, which can quickly generate assembly verification use cases; the assembler module completes the compilation of assembly instructions to binary machine codes, through the The assembler module generates the binary machine code that the CPU module can recognize; the CPU module is the verification subject of the CPU verification platform, and its design includes the design of the pipeline stage, and t...

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Abstract

The invention discloses a CPU verification platform based on Systemverilog, and belongs to the field of computer system structures. After the CPU module is started, the verification case generation module generates an assembly verification case with the suffix of. Asm, the reference model module reads the verification case and simulates the CPU module to complete the function of an instruction, and the CPU module also reads the verification case through the program RAM to complete the function of the instruction; the CPU module and the reference model monitoring module monitor instruction execution results of the CPU module and the reference model module and send the execution results to the result comparison module, and the result comparison module verifies whether the functions of the CPU module are correctly achieved or not by comparing the execution results of the CPU module and the reference model module. The CPU verification platform has good universality and transportability, and can be used by slightly modifying a reference model for different instruction set architectures. The CPU verification platform is successfully used for function verification of the 32-bit CPU chip,and compared with a previous verification method of the CPU, the verification efficiency is greatly improved, and the CPU delivery period is shortened.

Description

technical field [0001] The invention relates to the technical field of computer architecture, in particular to a CPU verification platform based on Systemverilog, which can be applied to the function verification of high-performance CPUs. Background technique [0002] With the continuous expansion of chip design scale and the continuous increase of chip complexity, the workload of chip function verification accounts for an increasing proportion of the chip development cycle. The CPU is an important part of the entire SOC chip design. In order to fully verify the functions of the CPU, verification engineers usually need to write thousands of verification cases, and need to run the tests one by one and analyze the results. [0003] According to statistics, the verification work accounts for about 70% of the time in the entire design. If manual analysis and error checking are completely used, the verification efficiency is extremely low, the correctness is difficult to guarant...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
CPCG06F11/3604G06F11/3624G06F11/3684Y02P90/30
Inventor 刘春锐张宏奎黄旭东陈振娇
Owner 58TH RES INST OF CETC
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