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Semiconductor device, power module, and manufacturing method for semiconductor device

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problem of increased equivalent series resistance

Pending Publication Date: 2021-03-19
NISSAN MOTOR CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, there is a problem that the equivalent series resistance (ESR) between the conductive layer and the electrode increases at the portion where the conductive layer is formed thinly inside the groove.

Method used

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  • Semiconductor device, power module, and manufacturing method for semiconductor device
  • Semiconductor device, power module, and manufacturing method for semiconductor device
  • Semiconductor device, power module, and manufacturing method for semiconductor device

Examples

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Effect test

no. 1 approach

[0047] figure 1 The shown semiconductor device 1 according to the first embodiment of the present invention has a first main surface 11 and a second main surface 12 facing each other, and includes: a conductive semiconductor substrate 10 in which grooves are formed on the first main surface 11, And a plurality of conductive layers stacked along the surface normal direction of the side surface of the groove. figure 1 It is a cross-sectional view along the short-side direction of the groove formed in the first main surface 11 .

[0048] The plurality of conductive layers disposed inside the grooves are either the first conductive layer 2A or the second conductive layer 2B. Hereinafter, the first conductive layer 2A and the second conductive layer 2B are collectively referred to as "conductive layer 20". exist figure 1 In the shown semiconductor device 1 , the conductive layer on the side of the groove in the conductive layer 20 is used as the first conductive layer, and the o...

no. 2 approach

[0093] Figure 21 A semiconductor device 1 according to a second embodiment of the present invention is shown. exist Figure 21 In the shown semiconductor device 1, the layer ratio of the conductive layer 20 and the dielectric layer 30 formed inside the groove is figure 1 There are many semiconductor devices 1 shown. Therefore, the capacity of the capacitor structure formed in the semiconductor device 1 can be increased. About other structures, it is the same as that of 1st Embodiment.

[0094] exist Figure 21 In the illustrated semiconductor device 1 , seven conductive layers 20 and seven dielectric layers 30 are alternately arranged inside the trench. Such as Figure 21 As shown, the conductive layer closest to the side of the groove is used as the first conductive layer, and the odd-numbered conductive layers are electrically connected to each other and to the first electrode 41 . That is, the conductive layers 21 , 23 , 25 , and 27 that are odd-numbered conductive ...

no. 3 approach

[0104] Such as Figure 28 As shown, in the semiconductor device 1 according to the third embodiment of the present invention, the upper end position of the second conductive layer 2B is further away from the upper end position of the first conductive layer 2A connected to the first electrode 41 disposed on the first main surface 11. The first main surface 11. Then, the first electrode 41 and the first conductive layer 2A are directly laminated over the entire first main surface 11 . That is, for figure 1 The structure is the same as that of the case where the contact hole 120 of the shown semiconductor device 1 is formed on the entire surface of the first main surface 11. On the first main surface 11 outside the groove, the dielectric layer 30, Insulating protective films 51, 52. About other structures, it is the same as that of 1st Embodiment.

[0105] exist Figure 28 In the illustrated semiconductor device 1 , the first electrode 41 is electrically connected to the fir...

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Abstract

The present invention is provided with: a semiconductor substrate (10) having electrical conductivity, comprising a first main surface (11) and a second main surface (12) which are opposed to each other, and having a groove formed in the first main surface (11); a plurality of conductive layers which are layered in a surface normal line direction of a side surface of the groove and each of which is a first conductive layer (2A) or a second conductive layer (2B); dielectric layers (30) which are disposed between a conductive layer among the plurality of conductive layers closest to the side surface of the groove, and the side surface of the groove, and which are disposed between the plurality of conductive layers; a first electrode (41) which is disposed outside the groove and which is electrically connected to the first conductive layer (2A); and a second electrode 42 which is disposed outside the groove and which is electrically connected to the second conductive layer (2B). The firstconductive layer (2A) is electrically insulated from the semiconductor substrate (10). The semiconductor substrate (10) electrically connected, inside the groove, to the second conductive layer (2B)is electrically connected to the second electrode (42).

Description

technical field [0001] The present invention relates to a semiconductor device having a semiconductor capacitor, a power module, and a method for manufacturing the semiconductor device. Background technique [0002] As a semiconductor capacitor, a structure in which a capacitor structure is formed inside a groove formed on the surface of a semiconductor substrate is used. For example, a structure of a capacitor structure in which conductive layers and dielectric layers are alternately stacked inside a trench is disclosed (see Patent Document 1). [0003] prior art literature [0004] patent documents [0005] Patent Document 1: Japanese PCT Publication No. 2009-515353 [0006] However, in the capacitor structure described in Patent Document 1, a part of the conductive layer formed inside the trench is extended to the surface of the semiconductor substrate, and positive and negative electrodes are respectively provided on the conductive layer on the surface of the semicond...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/822H01L21/8234H01L27/04H01L27/06H10N97/00
CPCH01L28/91H01L29/945H01L25/074H01L29/66181
Inventor 丸井俊治林哲也沼仓启一郎倪威田中亮太
Owner NISSAN MOTOR CO LTD