75results about How to "Add series resistance" patented technology

A magnetic tunnel junction (MTJ) device and fabrication method is disclosed. In a particular embodiment, a method is disclosed that includes forming a magnetic tunnel junction (MTJ) device on a structure that includes a bottom cap layer and a bottom metal-filled trench having a normal axis, the magnetic tunnel junction device including a bottom electrode, magnetic tunnel junction layers, a magnetic tunnel junction seal layer, a top electrode, and a logic cap layer, the magnetic tunnel junction device having an MTJ axis that is offset from the normal axis.

Inductive component including precisely one coil having a total inductance and a plurality of spiral turns which are realized in the form of conductor tracks having a conductor track width that tapers toward the center of the plurality of spiral turns, two tapping contacts at the coil, and a control circuit which is connected between the two tapping contacts and alters effective inductance of the coil.

A photovoltaic device is presented including one or more cell units. The photovoltaic device comprises a semiconductor substrate having a patterned light collecting surface defining an array of spaced-apart substantially parallel first grooves. Each of these first grooves has a bottom portion, comprising a bottom surface and side walls extending from the bottom portion and being substantially perpendicular to the surface of the device. A heavily doped semiconductor layer in the form of spaced-apart regions is located at the bottom surfaces of the first grooves respectively. Further improvement of performance is obtained by deposition of thin metal lines on top of the heavily doped spaced apart lines.

A light-emitting device 100 has ITO transparent electrode layers 8, 10 used for applying drive voltage for light-emission to a light-emitting layer section 24, and is designed so as to extract light from the light-emitting layer section 24 through the ITO transparent electrode layers 8, 10. The light-emitting device 100 also has contact layers composed of In-containing GaAs, formed between the light-emitting layer section 24 and the ITO transparent electrode layers 8, 10, so as to contact with the ITO transparent electrode layers respectively. The contact layers 7, 9 are formed by annealing a stack 13 obtained by forming GaAs layers 7′, 9′ on the light-emitting layer section, and by forming the ITO transparent electrode layers 8, 10 so as to contact with the GaAs layers 7′, 9′, to thereby allow In to diffuse from the ITO transparent electrode layers 8, 10 into the GaAs layers 7′, 9′. This provides a method of fabricating a light-emitting device, in which the ITO transparent electrode layers as the light-emission drive electrodes are bonded as being underlain by the contact layers, to thereby reduce contact resistance of these electrodes, and to thereby make the contact layers less susceptible to difference in the lattice constants with those of the light-emitting layer section during the formation thereof.

The invention discloses a vertical-cavity surface-emitting laser which comprises a substrate, a first Bragg reflector, a first limiting layer, an active region, a second limiting layer, a second Bragg reflector and an Ohmic contact layer which are arranged in a laminated manner, wherein the active region adopts a quantum well structure, a potential barrier layer is made of InGaAlAs, and a potential well layer is made of InGaAsN; a heavily-doped tunnel junction and a third limiting layer are also arranged between the second limiting layer and the second Bragg reflector; an oxidized limiting layer is also arranged in the second limiting layer. The invention also provides a preparation method of the laser. The laser has the advantages that the laser uses an InGaAsN / InGaAlAs material system as the active region, has large conduction band order ratio and can effectively limit injected carriers, so that the threshold current is reduced, and the laser gain is improved; on an isometric wavelength band of 1550 nm, the content of N required by an active region material is lower, and devices with high material quality are easy to obtain.

An electrical connector is constructed with at least one pin configured to provide different resistance values as the pin is engaged with a socket. When the connector is fully engaged with the socket the resistance of the connector is at a zero or minimal value. When the pin first contacts the socket, the pin includes a high series resistance minimizing the sudden inrush of current to an electrical device, and minimizing any arcing between the pin and the socket. As the pin engages the socket this series resistance decreases allowing the electronic device to utilize its full designed current with only minimal contact resistance between the pin and the socket.

The present invention provides an improved photovoltaic cell assembly (10) that includes at least plurality of photovoltaic calls (20). The cells include a photoactive portion (24) sandwiched between a top electrically conductive structure (28) on some regions of a top surface (28) of the photoactive portion leaving exposed top surface on other regions; and an opposing conductive substrate layer (22). The improved photovoltaic cell assembly also includes a plurality of conductive elements (80); a first encapsulant layer (40) In contact with the top electrically conductive structure and the exposed fop surface of the photoactive portion; and a second encapsulant layer (50) in contact with the opposing conductive substrate layer, the encapsulants holding the conductive elements to the cell layers.

The invention discloses a flexible multi-joint GaAs solar battery and a manufacturing method of the flexible multi-joint GaAs solar battery, and belongs to the technical field of semiconductor materials. Firstly, a flexible substrate and a battery epitaxial structure which is bonded with metal in the same way and composed of a base battery, a middle battery and a top battery are respectively prepared, and a first battery substrate is manufactured at the outer side of the top battery; secondly, a Ti layer, a Pt layer and an Au layer are sequentially plated on the back of the base battery of the battery epitaxial structure in an vacuum evaporation mode, and the battery epitaxial structure is bonded with a metal layer fully covering the outer surface of a polyimide coating; thirdly, Si3N4 deposits on the surface of the bonded metal layer, and then the first battery substrate on the battery epitaxial structure is removed through alkaline corrosion liquid; fourthly, two upper electrodes and an antireflection film are manufactured on the top battery of the battery epitaxial structure; finally, after a manufactured chip and a Si wafer are bonded on a second substrate through photoresist, and then the second substrate is removed through alkaline corrosion liquid. The manufactured flexible multi-joint GaAs solar battery is wholly flexible, can be applied to surfaces of different shapes, and is not broken easily.

The invention relates to a gallium nitride schottky rectifier with a metal substrate and a production method thereof. The rectifier comprises a metal substrate, a metallic bonding layer and a gallium nitride schottky rectifier chip, wherein the metal substrate is used as a support substrate, the gallium nitride schottky rectifier chip comprises a gallium nitride epitaxial layer, a gallium nitride schottky electrode and an ohmic electrode, the gallium nitride epitaxial layer is bonded with the metal substrate through the metallic bonding layer, and the gallium nitride schottky electrode and the ohmic electrode are transversely arranged on the other side of the epitaxial layer relative to the metal substrate. When the gallium nitride schottky rectifier is produced, the ohimic electrode and a schottky contact electrode are produced on a front face of an epitaxial wafer successively, then a sapphire substrate on the other side of the epitaxial wafer is stripped off through lasers, and the metal substrate is bonded on the epitaxial wafer. The gallium nitride schottky rectifier can overcome the compatibility of the metallization process of the GaN schottky rectifier and the stripping process of the sapphire substrate, can solve the heat dissipation of devices by using the metal substrate with high heat conductivity as a support carrier and a heat sink and can effectively improve the performance and reliability of the devices.

Cobalt polypyridine complexes are interesting alternative redox mediators for large scale manufacturing of dye-sensitized solar cells (DSCs) since they are less aggressive towards metal contacts and absorb less light than iodide / triiodide. Here we have examined the effect of steric properties of triphenylamine-based organic sensitizers and cobalt polypyridine redox mediators on the electron lifetime and overall device performance in DSCs. Matching the steric bulk of the dye and redox mediator was found to minimize recombination and mass transport problems in DSCs employing cobalt redox mediators. Recombination was efficiently slowed down by introducing insulating butoxyl chains on the dye, allowing the use of a cobalt redox mediator with a less steric bulk. The best efficiency of DSCs sensitized with a triphenylamine-based organic dye in combination with cobalt(II / III) tris(2,2′-bipyridyl) match the highest efficiencies obtained so far with iodide-free electrolytes, reaching a 6.3% overall conversion efficiency under AMI.5 condition (1000 Wm-2) and an efficiency of 7.8% at 1 / 10 of a sun. Organic dyes with high extinction coefficient can thus be used instead of standard ruthenium sensitizers to build thin films DSCs in order to overcome mass transport and recombination limitations associated with the cobalt redox couples. DSCs sensitized with organic dyes employing cobalt redox mediators are promising for low light intensity applications since the efficiency and voltage is high at indoor illumination.

The invention belongs to the technical field of preparation of perovskite solar cells and particularly relates to a zinc-doped nickel oxide hole transport layer reserve perovskite solar cell and a preparation method thereof. The reserve perovskite solar cell preparation method comprises steps: (1) FTO glass is provided; (2) the zinc-doped nickel oxide hole transport layer is prepared; (3) a perovskite body heterojunction thin film is prepared; (4) an electron transport layer is prepared on the perovskite layer; (5) an electrode modification layer is prepared; and (6) a metal electrode is prepared. The brand new hole transport layer is adopted, a hole extraction layer which has high transmittance, high conductivity and high work function and is well matched with the perovskite is obtained through optimizing the nickel oxide thin film by doped zinc, the performance is optimized, and the structure is stable.

A photodetector with an improved electrostatic discharge damage threshold is disclosed, suitable for applications in telecommunication systems operating at elevated data rates. The photodetector may be a PIN or an APD fabricated in the InP compound semiconductor system. The increased ESD damage threshold is achieved by reducing the ESD induced current density in the photodetector by a suitable widening of the contact at a critical location, increasing the series resistance and promoting lateral current spreading by means of a current spreading layer.

Disclosed are a solar cell and preparing method of the same. The solar cell includes a back electrode layer on a support substrate, a molybdenum oxide layer on the back electrode layer, a light absorbing layer on the molybdenum oxide layer, and a front electrode layer on the light absorbing layer.

The invention discloses a method for manufacturing an ESD gate grounded NMOS transistor. Through photoetching, the drain end and the edge of the grid electrode of the ESD transistor are in certain distance; a region (a drift region) between the drain end and the grid electrode is only provided with a lightly-doped source drain (LDD) region and no high-dosage drain adulteration; as square resistance of the LDD region is much larger relative to the high doped drain end, the method can ensure that larger series resistance is obtained under the condition of shorter length of the drift region without increasing area occupied by the transistor, thereby saving the area of the transistor; moreover, as the breakdown voltage of an LDD junction is lower than the drain end, the transistor decides the trigger voltage through the LDD junction, well achieves the aim of reducing the trigger voltage, does not need any extra ESD photoetching and ESD ion injection, thereby simplifying a process and saving cost.

A transformer may include a semiconductor layer coil, a trench coil connected with the semiconductor layer coil in parallel, and a metal layer coil opposing both of the semiconductor layer coil and the trench coil. The semiconductor layer coil and the trench coil may be insulated from the metal layer coil by an insulating layer.

The invention relates to a surface modification method of silver powder for solar battery front silver paste. The surface modification method comprises the steps that the silver powder is added to a mixed solution of a silane coupling agent solution and an organic fatty acid or organic fatty acid salt solution, then mixing is carried out for 10-40 mins, and sedimentation, washing, drying and screening are carried out, so that the treatment is completed. The silver powder after the surface modification is high in storage stability, good in dispersity, high in tap density and good in liquidity and is not prone to agglomerating; the wettability and the compatibility with an organic carrier of the silver powder are improved, and the silver powder is thus dispersed uniformly in paste; the hydrodynamics performance and the liquidity of the paste are improved; the compactness after sintering is improved; the series resistance is reduced and the open-circuit voltage is raised, so that the photoelectric conversion efficiency is improved; and the surface modification method is simple in technology, easy to implement and low in cost.

The invention discloses a preparation method of a ternary organic solar cell, and belongs to the field of the solar cell. The preparation method comprises the following steps of (1) configuration of an active layer material: taking CB as a solvent, taking PTB7 and a coumarin derivative as a donor material based on the mass ratio of PTB7 to the coumarin derivative of 0.7:0.1-1:0.l; taking PC71BM asan acceptor material at the mass ratio of the donor material to the acceptor material of 1:1-1:3; enabling the donor material, the acceptor material and the solvent to be mixed into an active layer solution with the concentration of 7-15mg / ml; (2) performing ZnO solution configuration; (3) performing cleaning on ITO glass, and then carrying out plasma ozone treatment; (4) spin coating the surfaceof the ITO glass with ZnO, and then carrying out heating and annealing; (5) spin coating the annealed ITO glass with the active layer material, and then carrying out heating and annealing to form anactive layer; and (6) evaporating an MoO<3> layer on the surface of the active layer and then evaporating an Ag electrode. By virtue of the preparation method, efficiency improvement of the device canbe facilitated.

The invention relates to a solar cell front face grid line and a solar cell sheet printed with the front face grid line. The front face grid line of the solar cell sheet comprises a main grid and a secondary grid and is formed by four mutually-parallel main grids and a plurality of secondary grid lines which are mutually parallel and are vertical to the main grids; cell back face electrodes are located on a cell back face and correspond to the quantity and the position of front face main grids; and a main grid line and the back face electrodes are formed by solid or hollow or sectioned patterns. According to the solar cell sheet disclosed by the invention, the filling factor and the conversion efficiency of a solar cell can be improved, and silver slurry consumption in a production process is reduced.

The invention relates to a method for forming electrical interconnection in an organic optoelectronic device, a method for making the organic optoelectronic device and the organic optoelectronic device. The method for forming electrical interconnection in the organic optoelectronic device comprises the following steps of: providing a first conductive layer; making an organic semi-conductive layer deposited on the first conductive layer; making a second conductive layer deposited on the organic semi-conductive layer; laser-irradiating a connecting area and electrically connecting the first conductive layer and the second conductive layer through the organic semi-conductive layer; and forming an electrical short circuit between the first conductive layer and the second conductive layer in the connecting area.

A laminated structure of a copper-zinc-tin-sulfur film solar cell and a preparation method thereof are disclosed. The laminated structure of the copper-zinc-tin-sulfur film solar cell comprises substrate glass, a transparent conductive layer deposited on the substrate glass, an n-type buffer layer deposited on the transparent conductive layer, a p-type copper-zinc-tin-sulfur absorbing layer deposited on the n-type buffer layer, a molybdenum sulfide interface layer deposited on a p-type copper-zinc-tin-sulfur absorbing layer, and a metal back electrode layer deposited on the molybdenum sulfide interface layer.

In an electrostatic actuator used to control fly height between a magnetic disc and a read / write head of a disc drive, a multi-layer electrode device is used. The multi-layer electrode device includes alternating insulating layers and conductive electrode layers. By controlling the material properties of each layer of the electrode device, problems associated with leakage current, field emission discharge, tunneling current, and slow actuator response time can be controlled.

The invention provides an LED epitaxial wafer and a preparing method thereof. The LED epitaxial wafer comprises a substrate layer, a first semiconductor layer, an interpolating layer, a light-emitting layer and a second semiconductor layer, wherein the substrate layer, the first semiconductor layer, the interpolating layer, the light-emitting layer and the second semiconductor layer are sequentially stacked. The interpolating layer is a GE doping GaN layer, ESD performance can be effectively improved, lighting efficiency is intensified, the brightness of an LED is improved, defects are not generated, the situation that the electrical property of a component becomes poor due to increase of serial-connection resistors cannot occur, and meanwhile the production process is simple.

A transformer may include a semiconductor layer coil, a trench coil connected with the semiconductor layer coil in parallel, and a metal layer coil opposing both of the semiconductor layer coil and the trench coil. The semiconductor layer coil and the trench coil may be insulated from the metal layer coil by an insulating layer.

The invention belongs to the technical field of microelectronic devices. The invention discloses an analog HfOx / HfOy homojunction memristor and a regulation and control method thereof. The homojunction memristor comprises a lower electrode layer, a functional layer and an upper electrode layer which are sequentially stacked from bottom to top, and the functional layer is an HfOx / HfOy homojunctionfunctional layer formed by stacking an HfOx layer and an HfOy layer from bottom to top; for the HfOx / HfOy homojunction functional layer, 1.6<x<1.8, 1.9<y<2, and the thickness of the HfOx layer is larger than that of the HfOy layer. According to the invention, the key device structure, especially the functional layer composition and the like, is improved; the hafnium oxide lamination with high / lowoxygen vacancies grown in a stacked manner is used as the resistive function layer, and compared with the prior art, the technical problems of small resistance gradual change window, low operation speed and poor consistency of an analog memristor and an electronic synaptic bionic device based on the analog memristor can be effectively solved.

The invention discloses a high-concentration multi-junction solar cell and a preparation method thereof. The high-concentration multi-junction solar cell consists of a top cell, a middle cell, a bottom cell and two tunneling junctions, wherein emission layers of the top cell and the middle cell adopt gradient doping layers; the emission layer of the top cell is hundreds of nanometers thicker than the conventional multi-junction cell. The invention relates to a high-concentration multi-junction solar cell, wherein emission layers of sub-cells on the top and middle parts respectively utilize the gradient doping manner, have higher open-circuit voltage and short-circuit current. Simultaneously, under the high-concentration condition, the emission layer of the top cell is thicker than the conventional multi-junction cell so that the whole serial resistance of the multi-junction cell is reduced, the filling factor of the cell is improved and the higher photoelectric conversion efficiency is achieved.

A multilayer capacitor comprises a multilayer body in which a plurality of dielectric layers and a plurality of first and second inner electrodes are alternately laminated, and first and second terminal electrodes formed on the multilayer body. The plurality of first and second inner electrodes are electrically connected to each other through a connecting conductor. A part of the plurality of first inner electrodes and a part of the plurality of second inner electrodes are electrically connected to the first and second terminal electrodes through lead conductors, respectively. Each first inner electrode connected to the respective first terminal electrode through the lead conductor and each second inner electrode connected to the respective terminal electrode through the lead conductor are arranged at positions symmetrical to each other about the center position in the laminating direction of the multilayer body. Alternatively, one or a plurality of first inner electrodes connected to the first terminal electrode through the lead conductor and one or a plurality of second inner electrodes connected to the second terminal electrode through the lead conductor are arranged at respective positions symmetrical to each other about the center position in the laminating direction of the multilayer body.

The invention discloses lead-free glass powder for solar batteries. The lead-free glass powder is prepared from bismuth oxide, antimony oxide, zinc oxide, boracic acid, silicon oxide, rhenium oxide and strontium oxide. The invention further discloses pure silver paste containing the lead-free glass powder. Products of the lead-free glass powder are uniform in granule and good in dispersity, and the softening point is between 420 DEG C and 480 DEG C; components of zinc oxide, silicon oxide and boron oxide can improve the chemical stability and heat stability of glass, and the boron oxide component can further reduce the thermal expansion coefficient of the glass powder; bismuth oxide serves as a redox active additive, the stability of the antimony oxide component in the glass powder preparation is promoted, and the precipitation of metal bismuth is avoided; besides, the preparation method of the glass powder is simple in process, glass prepared from the glass powder is small in granule size and uniform in performance, better sintering of conductive silver powder can be further promoted, so that an electrode is more compact, the good ohmic contact is formed, the series resistance is reduced, and therefore the efficiency of battery pieces is improved, and the service life of the battery pieces is prolonged.

The invention discloses a low-trigger-voltage and low-parasitic-capacitance silicon controlled structure which comprises a P-type substrate, wherein a first P well, a first N well, a second P well and a second N well which are tightly connected are arranged on the P-type substrate in sequence; in the direction of the first P well pointed to the second N well, a first P+ injection region positioned on the first P well, a first N+ injection region positioned on the first N well, a second N+ injection region positioned on the second P well, a third N+ injection region crossing the second P well and the second N well and a second P+ injection region on the second N well are sequentially arranged on the first P well, the first N well, the second P well and the second N well; and laminated gateoxide and a polysilicon gate are arranged between the second N+ injection region and the third N+ injection region, and shallow ditches are all partitioned between the other two adjacent injection regions. The silicon controlled structure provided by the invention can be used as an electrostatic discharge protective device for integrated circuits and has the advantages of low trigger voltage, strong robustness and low parasitic capacitance.