Reconfigurable array unit and array for lightweight block cipher algorithm

Abstract

The invention provides a reconfigurable array unit and array for a lightweight block cipher algorithm, and relates to the field of integrated circuits. The array unit comprises a logic unit LOU, an S box lookup table unit LUT, an arithmetic unit AU, a permutation unit PU, a shift unit SU, a finite field multiplication unit GU, a multiplexer MUX and a register REG. The logic unit LOU, the S box lookup table unit LUT, the arithmetic unit AU, the replacement unit PU, the shift unit SU and the finite field multiplication unit GU receive 16bit data input, after corresponding operation of the units is completed, operation output of all the functional units is transmitted to the multiplexer MUX, and reconstructed password data output is completed through the register REG. The problems that in the prior art, an ASIC implementation mode of a special integrated circuit is adopted for a cryptographic processor chip, and flexibility and expansibility are poor are solved; and an instruction set structure microprocessor ISAP implementation mode is adopted, so the technical problem of low energy efficiency is solved.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a reconfigurable array unit and an array oriented to a lightweight block cipher algorithm. Background technique [0002] In recent years, with the rapid development of Internet of Things technology, communication technology and computer technology, communication and computing functions can be implemented in embedded devices with smaller hardware area and lower end, and applications usually exchange sensitive or private data, so ensure appropriate A high level of data security is a fundamental requirement, and the lightweight block cipher algorithm is specifically designed for resource-constrained devices. [0003] As an important guarantee of information security, the cryptographic processor chip has higher and higher requirements on its security, flexibility, and power consumption. From the perspective of the architecture, the current cryptographic processor chips can be divi...

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Problems solved by technology

[0004] Based on the above-mentioned problems, the present invention provides a reconfigurable array unit and array oriented to a lightweight block cipher algorithm, to solve the problem of the flexibility and flexibility of the ASIC implementation mode of the cryptographic processor chip in the prior art using an application-specific integrated circuit. The scalability is very poor; the technical problem of low energy efficiency in the implementation of the instruction set structure microprocessor ISAP

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