Interconnect circuit system, verification system and method

A circuit system and circuit module technology, applied in the field of interconnected circuit systems and verification systems, can solve the problems of high labor cost, inability to provide interconnection channels for multiple bus transmission protocols, poor reusability, etc., to achieve low labor cost and reusability. strong effect

Active Publication Date: 2021-07-13
北京燧原智能科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, the existing interconnection bus model cannot provide a common interconnection channel for various bus transmission protocols, an

Method used

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  • Interconnect circuit system, verification system and method
  • Interconnect circuit system, verification system and method
  • Interconnect circuit system, verification system and method

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0037] Example one

[0038] figure 1 A structural diagram of an interconnected circuit system provided by the embodiment of the present invention, the present embodiment can be applied to the case where the synergistic work capability between the core function module is verified under the conditions of the interconnected circuit of the core circuit module. Such as figure 1 As shown, the interconnected circuit system 10 provided in this embodiment includes: a interconnected bus model 11 and a protocol transaction pool 12, wherein

[0039] The protocol transaction pool 12 is used to receive the protocol transaction transmitted by the measured circuit module 60, store the protocol transaction, and generate the transaction transaction corresponding to the protocol transaction, transmitting the to the Internet to the interconnected bus model 11. The measured circuit module 60 includes a host circuit module 61 and a slave circuit module 62;

[0040] The interconnected bus model 11 is c...

Example Embodiment

[0090] Example 2

[0091] Figure 7 A structural diagram of a verification system for a synergistic operation between the integrated circuit modules provided by the second embodiment of the present invention, the present embodiment can be applied to a collaborative work capability between the core function module under the condition of the interconnected circuit of the core circuit module. Verify the case. Such as Figure 7 As shown, the verification system in which the integrated circuit module works, specifically includes: an excitation model 30, a function analog model 20, a memory model 40, a scoreboard 50, and an interconnect circuit system of at least one of the present invention. . among them,

[0092] The excitation model 30 is configured to generate an instruction set, the interconnection circuit system configuration information, and the memory model configuration information of the measured circuit module 60, and transmit the command set to the host circuit module 61 and ...

Example Embodiment

[0139] Example three

[0140] Figure 9 A flow chart of a verification method of a synergistic operation of an integrated circuit module provided in the first embodiment of the present invention, the present embodiment can be applied to the synergistic work capability between the core function module under the condition of the interconnected circuit of the core circuit module. Verify the situation. The method can be performed by a verification system that works between the integrated circuit modules provided by the embodiment of the present invention, which can be implemented in software and / or hardware and can generally be integrated into the computer.

[0141] Such as image 3 Accordingly, the verification method of synergistic work in the integrated circuit module in this embodiment includes:

[0142] S310, by the excitation model generates the command set, the interconnection circuit system configuration information, and the memory model configuration information of the circu...

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Abstract

The embodiment of the invention discloses an interconnected circuit system, a verification system and a method. The interconnected circuit system includes: an interconnected bus model and a protocol transaction pool, the protocol transaction pool is used to receive the protocol transaction sent by the circuit module under test, store the protocol transaction, and generate a transaction to be transmitted corresponding to the protocol transaction , sending the transaction to be transmitted to the interconnection bus model; wherein, the circuit module under test includes a master circuit module and a slave circuit module, and the protocol transaction includes a protocol access transaction and a protocol feedback transaction; the interconnection The bus model is used to receive the transaction to be transferred, and realize the transfer of the transaction to be transferred between the master circuit module and the slave circuit module. The above-mentioned interconnection circuit system can provide a general interconnection channel for various bus transmission protocols, and has strong reusability.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of integrated circuits, and in particular to an interconnected circuit system, a verification system and a method. Background technique [0002] In chip design, especially 5G and artificial intelligence chips, large-scale interconnection of core circuit modules is essential. In the early development of integrated circuits, more than 70% of the workload is in the verification stage. Among them, in the absence of interconnection circuits, completing the interconnection function verification of core circuit modules and providing feedback on performance and interconnection circuit design is an effective way to improve verification completeness, optimize function and performance design, and shorten verification time. In this situation without interconnected circuits, an interconnect bus model is essential. [0003] At present, the existing interconnection bus model cannot provide a common ...

Claims

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Application Information

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IPC IPC(8): G06F30/367
CPCG06F30/367
Inventor 杨兵
Owner 北京燧原智能科技有限公司
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