180 results about "Module under test" patented technology

The invention provides an active optical module multi-channel automatic test system and a method. optimal signals emitted by a tested optical module are monitored, and indexes of the incident light power, emission current, bias current, temperature, voltage, extinction ratio, eye diagram allowance, crossing point, OMA (optical modulation amplitude) etc. are measured and calculated; if the above indexes are all in accordance with the standard, the sensitivity of the optical module is tested, the emission optical power of the tested module is enabled to reach the sensitivity of the test standard via the adjustment of an attenuator, and error code tests are conducted; and if there is no error code, indexes of alarm value and alarm recovery etc. of the optical module are tested. According to the test system, an error detector, an optical module test board, an optical power meter, and the attenuator employed by the test system are all multi-channel devices, an optical switch and an optical splitter are combined for time-sharing multiplexing of one oscilloscope, at least 8 modules can be simultaneously tested, the utilization rate of the oscilloscope and the test efficiency of the optical module are greatly optimized, the equipment cost and the manual cost are reduced, and automatic and batch production of the optical modules is realized.

The invention relates to a method for constructing a verification and test platform of network chip module level functions, comprising the construction of a simulation and reference model of the tested modules, which is characterized in that: the method comprises the construction of all modules and documents; the output of an excitation generating model is connected with the inputs of the tested module and the simulation and reference model, a clock and a reset generating module are connected with the tested module and the clock and reset signal of the simulation and reference model, a register initialization module is connected with the register of the tested module and the simulation and reference model, and a CPU simulation module is connected with the CPU of the tested module; the output of the tested module is connected with the simulation and reference model, thus, the network chip module level function verification and test platform can be constructed. The invention has the advantages that the platform can be constructed easily and directly, so the time required to construct the module level function verification and test platform can be shortened greatly in the high performance network chip verification process; meanwhile, the platform constructed by the method has clear structure which is easy to be understood and has improved reliability.

The invention relates to a method for establishing a large-scale network chip verification platform. The method comprises the following steps of: firstly, establishing a control text document, and then writing an initial function of a random function library, and writing a calling function of the random function library; secondly, establishing a module-level function verification platform, comprising the following steps of: generating a top-level module of the module-level function verification platform, establishing a clock generating module and a reset generating module, establishing an interface signal module, establishing a test vector generating module, establishing a register configuring module and establishing a reference model module of a tested module; and thirdly, establishing a chip-level function verification platform, comprising the following steps of: generating a top-level module of the chip-level function verification platform, multiplexing the clock generating module, the rest module, the interface signal module, the test vector generating module, the register configuring module and the reference model module of the module-level function verification platform, and establishing a CPU simulation model. The method has a strong function, high efficiency, stability and simple structure. By means of the invention, the time for setting up the network chip verification platform can be greatly shortened and the stimulation efficiency can be improved.

The invention provides an automatic test platform and a test method for a blade type server. The test platform comprises a plurality of types of test equipments, a monitoring computer, a controller, aclient and a computer product under test. The devices are connected with each other through local area network. The corresponding tested modules of the tested computer products are respectively connected with the corresponding interfaces of the corresponding test equipments of various types; The controller controls the testing process of all computer products under test, and executes test flow instructions edited by the user, The instructions arrive at the monitoring computer through the network, the corresponding test equipment is parsed and controlled, the corresponding test items are executed, the instruction information is recorded in the database, the test data fed back by the test equipment is forwarded to the monitoring computer through the network, the monitoring source code is parsed by loading different parsing files, and the test data is stored; users use clients to log on to query the corresponding working status and test information status, and carry out query, return visits and analysis on the data as required.

Systems and methods for performing design verification testing in which test cases are analyzed to determine the characteristics that will be verified in a module under test, and in which the identified characteristics are used to selectively enable checker modules needed to verify the characteristics implicated by the test cases, while disabling other checker modules. In one embodiment, a system includes a test case analyzer and a checker selector. The test case analyzer analyzes one or more test cases and identifies test case characteristics that are associated with each of the test cases. The checker selector is coupled to the test case analyzer and receives identification of the test case characteristics from the test case analyzer. The checker selector then selectively enables a first set of design verification checkers and disables a second set, based on the test case characteristics identified for the test cases.

The invention discloses a system and a method for realizing coverage rate test, which are applicable to various operating systems for counting coverage rate. The system comprises a source code analyzer, a code implanting device, a code dotting module and a calculation module. The source code analyzer is connected with a tested module and used for performing source code analysis to the tested module and counting the amount of command to be tested in the tested module; the code implanting device is connected with the tested module and used for inserting code dotting program before the command to be tested in the tested module and recoding the source code in which the code dotting program is inserted; the code dotting module is connected with the tested module and used for recording the transferring numbers of the code dotting program; and the calculation module is connected with the source code analyzer and the code dotting module and used for calculating the ratio between the transferring numbers of the dotting program and the total amount of the command and outputting the ratio. The invention performs coverage rate test on the basis of source code analysis, thereby being applicable to different operating systems and being improved in the compatible and practical performance.

The invention provides a power semiconductor device loss characteristic test platform and method. The device comprises a DC power supply module used for providing electric energy to a tested module according to a given reference voltage, the tested module comprising at least one tested unit used for simulating a work state of power semiconductor devices, a driving module used for controlling switch states of the power semiconductor devices of the tested unit according to a switch state signal outputted by a main control module, a measurement module used for detecting an electrical state and atemperature state of the power semiconductor devices of the tested unit and a corresponding load module, and the main control module used for analyzing the result measured by the measurement module and controlling the whole test platform to acquire loss characteristics of the power semiconductor devices of the tested unit. The device is advantaged in that switch and state characteristic tests of the multiple power semiconductor devices close to a real work state can be realized, and setting of multiple test conditions including current, voltage and temperature can be carried out.

The invention discloses a system and a method for automatically testing an analog module with a settable input / output (I / O) channel in a programmable logic controller (PLC). The system comprises an upper control computer, a programmable direct current signal source, a digital multimeter, a channel and voltage / current mode switching control plate and a communication interface, wherein the upper control computer sets a testing parameter, issues an instruction to realize output or measurement, receives a test result and makes judgment according to the result; the programmable direct current signal source receives the instruction and the parameter to set the output as a voltage or current mode, sets and outputs a voltage / current signal to an input channel; the digital multimeter receives the instruction to set the measurement as the voltage or current mode, measures the voltage or current signal output by an output channel and returns a measured value to a computer; the channel and voltage / current mode switching control plate switches a test channel and a voltage / current connection mode according to the instruction; and the communication interface transmits the parameter, the instruction and the test result between each device and a tested model. A computer reads the conversion value of the voltage or current measured value of the input channel through the communication interface or transmits a set numerical value to the output channel to convert the set numerical value into a voltage or a current.

This invention relates to producing field of air conditioner, and especially relates to the system and method for detecting power supply modular and drive modular of frequency conversion air conditioner in its production process. Detecting system and method provided by this invention uses single-chip as core, and cooperates with exporting circuit of voltage measure signal, back-communication circuit of measure signal, communication circuit, indicator light circuit, control circuit of key-press. According to steps, automatically check and diagnose power supply modular and drive modular of frequency conversion air conditioner. And automatically export checking outcome. The invention can greatly reduce time of product line checking frequency conversion air conditioner, increase production effect. At the same time, this invention can check circuit which can not be checked by human. Further more, it can record trouble information of checked module and serial number of checked module with trouble. This invention is easy to do data analysis of trouble module and statistics product qualification rate. At the same time, the invention is easy to find reason of checked module with trouble.

A filter module configured for exhaust application, and a method and apparatus for testing the same are provided. In one embodiment, the filter module includes a downstream sampling port configured to allow a technician to sample flow, downstream of the filter module, from the cleanroom side of a filter module. In another embodiment, a shroud adapted to sealing engage a filter module under test is provided and includes a tube, disposed in the shroud, that couples a port to a downstream sampling port of the filter module.

The invention provides a software testing method and system. The method comprises the following steps: performing functional partitioning on a plurality of tested modules in tested software to generate a plurality of tested module sets and generate authority information corresponding to each tested module set; receiving a control command of testing personnel by a testing proxy server; forwarding the control command to the corresponding tested module set by the testing proxy server according to the authority information of the testing personnel; after executing the control command by the tested module set, acquiring output view information related to the control command by the testing proxy server; and transmitting the output view information to the testing personnel by the testing proxy server. According to the method provided by the embodiment of the invention, on one hand, the software which cannot be opened to outsourcing and remote testing personnel for the sake of security and privacy can be tested to expand the testing range and improve the testing efficiency and quality, and on the other hand, the tested software is not required to be provided for the testing personnel such as the outsourcing personnel and the remote testing personnel, so that decompiling cannot be performed to acquire a source code and the security is high.

A device and an implementation method thereof used to realize the general stub function. The device comprises a module under test which is used to store the function to be tested; a withdrawn module used to analyze the function to be tested of the module under test, so as to obtain the information concerning the function to be tested; a symbol table module used to store the information of the function to be tested; a buffer module used to store the parameter information which is demanded for realizing the stub function. The general stub function module can obtain the parameter information from the buffer module; the parameter information is demanded by the stub function; the relevant warehouse and the register shall be arranged and the stub function shall be realized. The driving function module can drive the function to be tested in the module under test and the function to be tested can be jumped to the general stub function module as the function is used. The device reduces the workload as editing the stub function in the process of the unit test. Also, the realization can be easily made. Therefore, the realization of the general stub function can be achieved in various operating systems and editing conditions.

The invention discloses a test system for intelligently diagnosing faults of a high-integration digital signal processing system, and aims to solve the problem of low fault diagnosis capability of anexisting boundary scanning test system. According to the technical scheme, an intelligent test platform management unit operates control software, collects data of multichannel signals, generates a test sequence, allocates physical addresses to all modules, lists all the modules connected to a system backboard on a software interface, processes the multichannel data and diagnoses faults; the control software calls boundary scanning test software to generate a test vector for the tested module, applies the test vector to the chip core logic input end to form a circuit fault criterion, and sendsthe circuit fault criterion to the boundary scanning controller; the test vectors of different regions are loaded to a tested module to generate a fault injection vector, and the fault injection vector is transmitted to a fault injection controller; and the fault injection vector is loaded to the tested module to complete the fault diagnosis of the multichannel signal processing subrack platformmodule-level digital chip.

The invention discloses an FPGA (Field Programmable Gate Array) online verification structure and a method based on a serial communication interface. The structure comprises a software simulation environment, a hardware test environment and a physical channel, wherein the software simulation environment is configured to be in signal interaction with the hardware test environment through the physical channel; the software simulation environment produces test vectors and debug commands of a bus cycle, and receives a feedback signal to display in a wave way; the hardware test environment receives the test vectors and the debug commands, and sends the feedback signal. The verification structure and the method not only can effectively provide an FPGA online verification platform and simulate a working process of an integrated circuit module or a chip, but also has the characteristic of platform reusability, and are not designed aiming at a specific module; in addition, verification personnel can intuitively monitor and configure the port state of a module to be tested.

A verification agent can be used to verify hard and / or soft modules under test in an integrated circuit. The integrated circuit contains a processor and memory for storing code executable by the processor. The module under test performs predetermined operations. The verification agent interacts with the module under test, including sending signals to the module under test and generating results based on the interaction. The code causes the processor to receive the results and compare the results with expected values. The module under test may be deemed to operate properly if the actual results match the expected values.

A database architecture and method of using a database is disclosed. The database is intended for use with a product stress testing system in which a large number of different modules may be subjected to a variety of stressors including environmental stressors and functional load testing. The database also enables a wide variety of test and communication equipment to be used in an efficient manner to test and communicate with the module being tested. Generic commands may be translated to test and communication equipment specific command strings as well as module specific command strings. Data collected from these various devices by the stress testing system may also be parsed and stored in fields associated with the corresponding module being tested. The product table, result table, process table, and equipment command & communication tables are interrelated through defined data associations. These data entities and their mutual data relationships revolve around the module being subjected to the stress test. In this way the stress test results may be associated with the various products, the results may be mapped against product-specific test criteria, and generic commands may be translated to product-specific commands. A virtual oven may be used as the stress-testing system and includes a logical grouping of modules, a controller, test instruments which are all connected via a network to the database for collection of the data, control of the system, and generating displays and reports.

The invention discloses a detecting device and a detecting method of time sequence parameters of a small package pluggable transceiver. The device comprises a test board, a module to be tested, a standard module, singlechips and an upper computer, wherein the test board is provided with two slots, the module to be tested is plugged in one slot, the standard module is plugged in the other slot, a transmitting terminal of the module to be tested is connected with a receiving terminal of the standard module via optical fiber, a receiving terminal of the module to be tested is connected with a transmitting terminal of the standard module via optical fiber, the singlechips are plugged in parallel on the test board, the singlechips are respectively a control-type singlechip and a bus-type singlechip, time sequence pins of the module to be tested and the standard module are respectively electrically connected with input / output ports of the control-type singlechip via the test board, the control-type singlechip is electrically connected with the bus-type singlechip via a serial bus, and the bus-type singlechip is communicated with the upper computer via a USB conversion chip and a serial conversion chip on the test board. The invention can realize the effects of automated testing, simple operation and high measurement accuracy.

The invention discloses a liquid crystal module test system based on an SOC-FPGA, comprising a PC, a liquid crystal module test module, and a liquid crystal module under test. The liquid crystal module test module includes a main control unit and a test signal generation device. The test signal generation device includes a signal generation unit and a signal conversion unit. The main control unit receives a test file generated by the PC through a built-in Ethernet interface, stores the test file in a storage unit DDR3 of an ARM, parses the test sequence and pattern storage address according to a command input by an input unit, and sends a signal to the signal generation unit. The liquid crystal module test system has the significant effects of hardware cost saving, power consumption reducing, module size reducing, failure rate reducing, and the like, can be upgraded flexibly, and supports higher resolution and interface type.

The present invention discloses a distributed automatic software testing method and system. The method is as follows that: 1) a server loads the software test task list and a configuration file of each client, checks the state of each client, establishes a client state table, and selects two to-be-tested algorithms of A and B with same functions; 2) each client carries out environment deployment according to the algorithm A, and the server selects an unexecuted test task from the software test task list and sends the test tasks to a selected client; 3) the client executes the received test task and sends a test result to the server; 4) the clients update the environment deployment according to the algorithm B, and repeating steps 1) to 3); and 5) the server determines whether two test results corresponding to each test task are different, for the test task with performance degradation, test is carried out based on the dichotomy, and the patch leading to performance degradation of the tested module is automatically positioned finally. According to the method and system disclosed by the present invention, the developer can analyze and solve the corresponding problem in a facilitated manner.

The invention provides a method and device for distributed testing of module stability. The method for distributed testing of module stability comprises the steps of obtaining configuration files relevant with test data, and enabling the configuration files to record every test data set mark in a data row mode; splitting the configuration files according to rows to obtain more than two data rows, determining computation nodes corresponding to the data rows according to the test data set marks in the data rows, and sending the data rows to the corresponding computation nodes; determining storage addresses of test data sets on every computation node according to the test data set marks in the received data rows, and obtaining the test data sets of the storage addresses, deploying tested modules on every computation node, and running the obtained test data sets in the deploying tested modules so as to output test logs. According to the method and device for distributed testing of module stability, module stability test efficiency can be effectively improved.

Aspects of a method and system for simulation and verification of communication devices are provided. In this regard, a wireless communication system that comprises at least a wireless signal source and the wireless communication device may be simulated utilizing a plurality of configurable modules that comprises: a module under test, a processor module, and a signal source module. A subset of processor modules may be selected based on test cases to be performed for the simulation. The selection of the subset of processor modules may be performed without recompiling the processor module. A subset of signal source modules may be selected based on characteristics of a signal source to be modeled during the simulation. The selection of the subset of signal source modules may be performed without recompiling the signal source module.

A GPS module test system for automatically calibrating a test signal includes a GPS test fixture, a satellite signal simulator, and a computer. The GPS test fixture carries a GPS module under test and is electrically connected to the same through contact, so as to receive a digital signal generated by the GPS module after the test. The computer receives device information of the GPS module under test through the GPS test fixture, and controls the satellite signal simulator through a GPS signal sample database, so as to generate a GPS analog signal to test the GPS module under test. Thereafter, on receiving the digital signal generated by the GPS module under test and determining the received digital signal is attenuated, the computer automatically gains a transmitted test parameter, so as to transmit the GPS analog signal in a preferable state.

The invention provides a distributed cluster performance test system, method and device. The system comprises an upstream cluster, a tested module, a back end cluster, a network bridge, a pressure tool and a monitoring module. The network bridge is used for receiving a first pressure request sent by the upstream cluster, sending the first pressure request to the tested module, receiving a second pressure request generated by the tested module according to the first pressure request, forwarding the second pressure request to the back end cluster and storing the first pressure request and communication data packs returned by the back end cluster according to the second pressure request. The pressure tool is used for sending preset pressure to the tested module according to the first pressure request, and the tested module forwards the preset pressure to the network bridge, so that corresponding packs in the stored communication data packs are checked and are returned to tested module. The monitoring module and the tested module are placed on the same server. The monitoring module is used for monitoring performance data of the server and carrying out performance analysis according to the performance data. The network bridge is used for simulating a real cluster, performance test accuracy and test efficiency are improved, and cost is saved.

The invention relates to a UVM environment constructing method and system, and belongs to the technical field of universal verification methods. The method includes the steps that according to the number and the type of monitored module interfaces, assemblies corresponding to the interfaces are configured in a graphic input mode, wherein each assembly at least comprises a sequencer, a driver and amonitor, and configuration files of graphic structures are generated; the configuration files of the graphic structures are analyzed, and UVM tree structures and corresponding UVM environment files are obtained; monitored modules are connected, and the UVM verification environment is established. The system comprises a configuration module, an analysis module and a calling module. According to UVM environment constructing method and system, the learning difficulty and the development difficulty of verification engineers are reduced, time of developing the verification environment is saved, verification time is shortened, and the verification efficiency is improved.

The invention relates to a transmission line, and a scattering parameter testing system and method. The transmission line comprises a first conducting line and a second conducting line which are usedfor transmitting radio frequency signals; a connecting line is arranged between the first conducting line and the second conducting line; the connecting line includes a first connecting line and a second connecting line; the first connecting line has a first end and a second end; the first connecting line is connected with the first conducting line through the first end, and the first connecting line is connected with the second connecting line through the second end; and the second connecting line is a coupling line in coupling connection with the second conducting line. The stability and theconsistency are relatively high, and an individual test can be performed to obtain scattering parameters. The coupling line of the transmission line can be externally connected with a calibration part, and the scattering parameters used for calculating a required test result can be obtained by changing electrical parameters of the calibration part, so that a "de-embedding" test is achieved; and afirst tested module with the relatively poor consistency does not need to be measured, so that the test process is simple and convenient, and the error is small.

The invention belongs to a central control system of an automotive practical training platform. The central control system of the automotive practical training platform comprises tested modules of automotive assemblies, a computer control module,electrical connectors,an acquisition device, an on-off control device and an upper computer. The computer control module to execute tasks is preinstalled in the upper computer. The computer control module using a practical training software integrated development environment as a basic platform is started. The upper computer is connected with the acquisition device, the on-off control device and the tested modules of automotive assemblies through the electrical connectors, and real-time interaction is available. After execution of communicating, control and measurement tasks, test data acquired by the acquisition device in real time are converted into a format of standard protocol and are uploaded to the computer control module for processing. Therefore, learning procedure, examination procedure and assembly parts of a real automotive are integrated into the same system, so that teaching flexibility is improved, and high teaching cost is saved while teaching quality is improved greatly.

The invention provides a method for testing a Linux kernel-grade unit, which comprises the following steps of: compiling a tested module and loading the compiled tested module into a kernel space; building a kernel-grade unit testing frame; building a unit testing module; compiling the kernel-grade unit testing frame and the unit testing module together and loading the compiled module into the kernel space; and outputting a unit testing result.

The invention provides an acceleration simulation stand, comprises cylinder, mechanical transmission device and support. The cylinder drives measured module move in variable motion by mechanical transmission device. The mechanical transmission and measured module are set on the support. The invention is provided with simple operation and low cost so on. It can solve high cost of prior related equipment and complex operation so on well.

The invention relates to a UUT power supply management method and an ID identification circuit thereof. The UUT power supply management method comprises the following steps: 1) the ID number of a module UUT to be tested is read and whether the ID number is correct is judged, and a static test is conducted to the module UUT to be tested if the ID number is correct; and the power supply of an adapter is cut off and fault handling is conducted if the ID number is incorrect; 2) if the static test indicates that the condition of the module UUT is normal, power is supplied to the module UUT to be tested and an ATE automatically tests the UUT; and if the static test indicates that the condition of the module UUT is abnormal, fault handling is conducted; and 3) the electrical characteristics and the ID number of the module UUT to be tested are monitored during the automatic testing, the monitoring to the electrical characteristics and the ID number of the module UUT to be tested is ended if the electrical characteristics and the ID number of the module UUT to be tested are incorrect, the power is cut off and the testing result is output. The invention has the advantages that the impacts on the UUT caused by faults such as power supply errors or UUT circuit abnormality itself are avoided, the security of the UUT is improved and the ATE is protected.

The present invention provides an electromagnetic radiation test-based microwave circuit fault diagnosis device, which comprises a probe, an amplifier, a test instrument, a scanning frame, a controller, a main control computer and the like. The probe is adopted as a near-field antenna and is arranged on the scanning frame. Under the effect of the controller, the scanning frame moves along the X-axis and the Y-axis to conduct the scanning operation. Meanwhile, electromagnetic signals radiated from a to-be-measured module are coupled onto the scanning frame. After the result of the scanning operation is amplified by a low-noise amplifier, the parameter measurement is conducted. The computer analyzes the result of the parameter measurement and then plots the electromagnetic radiation intensity distribution diagram of the to-be-measured module. The electromagnetic radiation intensity distribution diagram of the to-be-measured module is compared with the electromagnetic radiation intensity distribution diagram of a performance-normalized module, so that an abnormal region can be found out. After that, a possible fault point is derived reversely on the basis of the abnormal region. According to the technical scheme of the invention, the damage of hard contact to microwave multifunctional modules and the impedance-mismatching influence can be avoided due to the adoption of the electromagnetic radiation test. Meanwhile, the occurrence of mis-operations, such as the contact with a power supply and the like, can be avoided. Therefore, the test instrument is prevented from being damaged, and the diagnosis efficiency is improved significantly.