139 results about "Validation testing" patented technology

The invention discloses an industrial MBSE model generation and evaluation method based on a large language model, and the method comprises the steps: collecting and sorting an aerodynamic model, assembly design rules and related basic design parameters, and carrying out the formatted expression of the rules applied in MBSE, so as to form a special enhanced knowledge base in the industrial field; the method comprises the following steps: converting a demand described by a natural language of a user into a standard MBSE model code based on a large language model through a cue word engineering technology, selecting an optimization algorithm and a simulation algorithm through a function call technology, performing real-time optimization on the model according to a design target, and applying the generated MBSE model to propulsion device design and verification test. And determining availability and model consistency. Reconstruction and acceleration of digital design are realized through automatic configuration based on requirements and components. The method has remarkable advantages in the aspects of reliability, effectiveness and adaptability.

The invention relates to a point-to-point access verification method and device, electronic equipment and a medium. The method comprises the steps of obtaining configuration information of a to-be-verified module; writing the configuration information of the to-be-verified module into a verification document, and storing the verification document as a JSON (JavaScript Object Notation) file; the verification document comprises at least one verification test item; each verification test item comprises a plurality of verification test paths; the JSON file is analyzed, and configuration information of the module to be verified is extracted; generating a plurality of universal verification methodology UVM components and UVM excitation files according to the configuration information based on a preset configuration script; establishing a script based on a UVM environment, and integrating the UVM component and the UVM excitation file to a UVM verification platform; in response to a target verification test command, performing test verification on a plurality of to-be-tested paths of a target verification test item on the UVM verification platform; the number of the target verification test items is greater than or equal to 1.

A computer-implemented method includes customizing artifacts of a large language model (LLM). A generative artificial intelligence (AI) (genAI) function of a software application that interfaces with the LLM and is instrumented for customer-side management is activated, as a genAI application. A verification test is activated to determine whether interactions between the LLM and genAI application generate expected results. Based on a result of the verification test, either adjusting the artifacts of the LLM or updating the genAI function of the software application. A new verification test is defined to determine whether interactions between the LLM and genAI application generate expected results. The new verification test is activated.

A system and method are provided for implementing a network component and verifying an update of the network component. The network component can be, e.g., a software-defined wide area network, a firewall, a router, or a load balancer. The network component can be an embedded network edge device that is implemented, e.g., in software, in circuitry, or using hardware acceleration (e.g., a data processing unit (DPU), a smart network interface card (SmartNIC), etc.). The updated version of the network component is verified by implementing it on a shadow dataplane concurrently with the current version operating on a primary dataplane, and comparing the performances of these two versions. Based on this comparison satisfying various verification criteria, the updated version passes a verification test and can be promoted to the primary dataplane.

The invention discloses an AI auxiliary test case generation and verification method and a terminal, and the method comprises the steps: obtaining and analyzing game commodity data, filling a script template with the analyzed game commodity data, verifying and adjusting the script template through a trained AI model, recognizing a test scene according to the adjusted script template, and carrying out the verification of the test scene. A corresponding test case is generated; and executing the test case, verifying the execution result of the test case through database query and log analysis, and generating a test report, so that the method can adapt to tests of different scenes and requirements, and the reliability and execution efficiency of the test are improved.

The invention discloses an AI-based network log analysis processing method, which comprises the following steps of: firstly, collecting network equipment log information through a collection script supporting multiple protocol modes, and writing the collection script and deploying and starting after determining equipment and protocol types; thirdly, carrying out preliminary classification, data supplementation and formatting processing on the original logs; and then, sending the processed log data to an AI large model for semantic analysis, including deep understanding, basic classification, secondary analysis and providing of processing suggestions. An analysis result is stored in a data think tank for historical comparison, and an inconsistent result is manually confirmed and corrected; when the network equipment triggers a fault alarm, calling the data think tank to supplement alarm content; and meanwhile, equipment related data handbooks provided by manufacturers are uploaded regularly, the analysis accuracy of the AI model is corrected, verification and testing are carried out, it is ensured that the scheme can comprehensively and efficiently collect and process logs, accurately analyze faults and continuously optimize the model, and effective support is provided for network fault processing.

The invention discloses a random excitation generation method, system and device for a chip verification test, and relates to the technical field of chip verification, and the method comprises the steps: determining the priority of all variables in excitation according to the constraint condition of excitation needed by a to-be-tested chip verification test case; whether inequality constraints exist in the constraint conditions or not is detected, if yes, the inequality constraints are equivalently replaced with a unified representation form, then subsequent steps are executed, and if not, the subsequent steps are directly executed; on the basis of the priorities of the variables, intersection of all the related constraints of each variable in the constraint conditions is solved, all the related constraints of each variable are converted into a range constraint, and thus an optimized constraint condition is generated; and on the basis of the optimized constraint conditions, according to the priorities of the variables, the random excitation required by the verification test case of the to-be-tested chip is obtained through successive stochastic operation from high to low.

A system and method are provided for continuous integration, continuous deployment of a network component, such as a software-defined wide area network, a firewall, a router, or a load balancer. The software development lifecycle is achieved without interrupting the data flow of the network by using a multi-dataplane architecture, including a primary dataplane and a shadow dataplane. A packet dispatcher relays ingress data packets to the primary dataplane executing a current version of the network component and the shadow dataplane executing an upgrade to the network component. A control plane agent analyzes / compares the performances of the respective dataplanes for verification testing, and the control plane agent upgrades the network component to the new version upon passing the verification testing. The upgrades is achieved without interruption to the data flow of the network component by gradually transitioning to outputting egress data packets generated using the upgraded version.

The embodiment of the invention discloses a security deployment method and device for enterprise-level applications and a medium, and relates to the technical field of security deployment, and the method comprises the steps: obtaining application topological graph data generated by a preset visual development platform, so as to split the application topological graph data into an atomized micro-service unit set through a quantization deconstruction engine, generating a micro-service dependency tree; scanning the target deployment environment, extracting an environment feature fingerprint of the target deployment environment, and generating an environment adaptation layer code according to the environment feature fingerprint; injecting an environment adaptation layer code into each atomized micro-service unit to generate an environment perception type micro-service package, and constructing a cross-cloud communication link matrix based on the micro-service dependency tree; and based on the environment-aware micro-service packet and the cross-cloud communication link matrix, executing a deployment verification test in the sandbox environment, generating a deployment verification report, and according to the deployment verification report, distributing the environment-aware micro-service packet to a target deployment environment node.

A method for providing an automated AI teaching and learning environment includes selecting an AI agent from an AI agent pool as a candidate AI agent according to performance of the AI agent after previous training and further according to capability requirements for capability-based training, and providing the capability-based training for the candidate AI agent. Providing the capability-based training includes acquiring first training data, generating a trained artificial intelligence (AI) agent by training the candidate AI agent to have at least one capability associated with using the first training data, generating synthetic validation data different from the synthetic training data, validating the trained AI agent by performing validation testing on the trained AI agent using first validation data that includes the synthetic validation data, and providing the trained AI agent as a validated AI agent after the validating the AI agent.

A component die validation built-in self-test (VBIST) engine is presented. In an aspect, a component die includes component circuitry for performing a component function, interface circuitry for communicating with another die, and a VBIST circuit. The VBIST circuit includes a traffic generator that generates test data streams, a tracker that receives and validates test data streams, and a configurable switching matrix for coupling the traffic generator to at least one of the component circuitry, the interface circuitry, or the tracker, and for coupling at least one of the component circuitry, the interface circuitry, or the traffic generator to the tracker. The VBIST circuit can send traffic to and from the component circuitry directly, or indirectly via the interface circuitry in loopback mode, and can be used for memory initialization and test.

The invention discloses an automatic testing method and device based on a front-end UI and a terminal, and belongs to the technical field of front-end development testing. Comprising the following steps: detecting a first test instruction of each set of front-end UI program, controlling to carry out demand analysis, determining a function module which needs to be subjected to UI automatic test according to a demand analysis result, and determining a test target; performing automatic technology type selection, and selecting a specified test tool and a continuous integration tool; generating a compiled test case according to the determined function module needing to be tested and the test target; running the test case, and generating a test script according to the test case and an automation technology type selection result; when the test script is verified to be correct, integrating the test script into a continuous integration tool, and automatically running a test through the test script when the code of the subsequent version of the front-end UI program is submitted; and generating a test report, positioning problems and giving repair suggestions. According to the invention, the testing efficiency is improved, and the labor cost of testing is reduced.

The invention relates to the technical field of artificial intelligence, and discloses an artificial intelligence algorithm model accuracy verification test method comprising the following steps: S1, data set preparation: collecting diversified data sets to cover more scenes and conditions; s2, whether cross validation is carried out or not is judged, if yes, a cross validation method is adopted, a data set is divided into a plurality of mutually exclusive subsets, a part of the subsets are cyclically used as a test set, the rest of the subsets are used as a training set for multiple times of verification and testing so as to evaluate the performance and stability of the model, and if not, the next step is carried out; and S3, selecting a proper evaluation index, and if cross validation is not selected, selecting a proper evaluation index. According to the method, the accuracy of the artificial intelligence algorithm model can be comprehensively and systematically evaluated, developers are helped to accurately understand the performance of the model in different data sets and scenes, and the model with better performance can be screened out by comparing the performance of different models in the same test set.

A computer-implemented method includes identifying a webpage comprising a set of user interface (UI) elements, analyzing the set of user UI elements to identify a set of interactable elements, classifying the elements of the set interactable elements as either focusable or not focusable, extracting features from source code corresponding to interactable elements of the set of interactable elements classified as focusable, and building an accessibility issue detection model using the extracted features from source code corresponding to focusable interactable elements as training data. The method may further include extracting features from source code corresponding to interactable elements classified as not focusable and updating the accessibility issue detection model using the extracted features from source code corresponding to interactable elements which are not focusable as training data. The method may further include storing one or more passed results and one or more failed results in a results database.

The invention provides a stress evaluation method and system for a TSV packaging structure, and relates to the technical field of semiconductor packaging, and the method comprises the steps: constructing a global coarse mesh model, cutting to generate a local TSV sub-model, and generating a failure feature mapping table; based on the failure feature mapping table and a preset process temperature curve, coupling solution is carried out on the local TSV sub-model, and a multi-physical field data set is output; training a failure probability prediction model by combining the failure feature mapping table based on the multi-physics field data set, and generating a digital failure atlas template; performing dynamic risk assessment based on the digital failure atlas template, the real-time process parameters and the dynamically calculated electrothermal coupling parameters, and generating a failure risk report; analyzing the failure risk report, and generating a mode-based optimization guide; and performing spatial deviation comparison based on the verification test data executed by the mode-based optimization guide, and when the spatial deviation exceeds a preset threshold value, outputting a failure map version updating mark and triggering the failure feature mapping table to iteratively update.

The invention relates to a software testing system and method, electronic equipment and a storage medium, and the software testing system comprises an operation parameter analysis module which obtains and analyzes test operation parameters of to-be-tested software, and determines a test case configuration file of at least one test case according to the test operation parameters; the case initialization module is used for generating at least one test case according to the test case configuration file and a first preset template; the case operation module is used for executing the test case to obtain an execution result of the test case; and the data verification module verifies the execution result of the test case to obtain a function test result of the to-be-tested software. The invention provides a highly modularized and automatic software testing system, the generation process of the test case is simplified by introducing the predefined template, a tester only needs to maintain the test operation parameters and the test case configuration file, repeated labor is reduced, the test requirements of different software and requirements can be met, and the test efficiency is improved. The universality of the system is enhanced, and the test efficiency is improved.

Systems and methods provide a HybridOps model for the identification, capture, isolation, feature engineering and adjudication of source signal data signatures for inclusion in calibration quality standard reference signal data signature libraries that improve machine learning and validation, reduces model bias and reduces model drift. The HybridOps model may include an “unlocked” AI / ML (machine learning enabled) public facing deployment pipeline in parallel with a clone AI / ML deployed in an internal development environment using a ML-Ops pipeline and in parallel with a clone“locked” AI / ML (machine learning disabled) as a standard reference. The three deployed models enables monitoring and measuring model drift, context drift and product progression for improved verification and validation of model reliability. The parallel environment AI / ML testing using randomized learning, validation, testing sets drawn from calibration quality adjudicated standard reference signal data signature libraries provides for validation, verification and test to failure procedures.

The systems and methods disclosed herein enable evaluation of machine learning model outputs within a virtual environment. The disclosed model validation platform enables testing of code generated for detection of malicious or anomalous outputs. For example, the model validation platform can construct a virtual machine isolated from the system and test model-generated code for validation of LLM-generated outputs. In some implementations, the model validation platform determines parameters of the virtual machine and / or associated validation test based on an evaluation of the machine learning model's output and / or the associated underlying prompt. For example, the parameters of the validation test depend on an evaluation of the user or the provided input (e.g., depending on the presence of sensitive data within the prompt). By doing so, the system enables dynamic evaluation of machine learning model outputs to improve the security and robustness of associated generated code.

The invention relates to the technical field of micro-grid simulation, in particular to a micro-grid closed-loop cross validation simulation system, method, device and medium, and the system comprises a bottom layer data generation module, a topology automatic mapping module, a communication protocol module, a master station control module, an index evaluation module, a human-computer interface module and a historical section playback module. The system can simulate steady-state operation characteristics of different types of micro-grid elements, interaction with an external micro-grid energy management system can be realized based on the system, and a closed-loop cross validation test is realized through a master station simulation function of the system; based on the system, simulation of different characteristic resources can be realized, verification of different investment subjects and different user operation targets, micro-grid dynamic aggregation capability verification, distribution and micro cooperation verification and the like can be realized, meanwhile, based on the system, micro-grid group verification can be realized, and a test environment is provided for master station micro-grid group cooperation control.

The invention relates to a verification and test integrated platform for a probe processor, and belongs to the technical field of processor verification and test. A probe processor adopts a self-defined probe instruction and a special probe operator unit, and a traditional verification and test mode is difficult to consider the requirements of module-level verification and system-level test. The UVM verification system, the test system and the management module are integrated, and unified management of verification and test is achieved. The UVM verification system is based on a UVM architecture, a virtual interface is associated with a to-be-tested unit (such as a probe operator, GPIO, UART and the like) of a probe processor through a forced binding mechanism, and module-level verification is achieved. The test system is responsible for compiling test codes into machine codes and loading the machine codes to the probe processor by starting the read-only memory, and system-level test is executed by the probe processor. And the management module adopts an automatic script to realize intelligent switching between verification and test modes, so that the probe processor is suitable for different test scenes, the test efficiency is improved, and the environmental redundancy is reduced. According to the method, the reusability of the test case is improved, the test consistency is ensured, the resource utilization rate is optimized, the automation degree and efficiency of verification are improved, and the method is suitable for efficient verification and test of probe processors and similar architecture chips.

Systems and methods for bias testing and remediation are disclosed. Decentralized Web Application Testing Systems use a Holochain framework to distribute testing workloads across Full Nodes and Lightning Nodes. A Holochain Node Management Application for configuring nodes, a UI Application creates test cases, and a Version Management System tracks changes. Test results are stored and analyzed in a Test Result Store, with a Bias Intelligence module detecting biases and generating additional test cases. A Consensus Algorithm validates test cases through decentralized nomination. An AI-Driven Defect Remediation System automates defect detection, root cause analysis, and remediation using AI modules. Machine learning algorithms identify patterns and anomalies, while NLP techniques generate code fixes. Predictive maintenance monitors application performance to preemptively address issues. A feedback loop mechanism continuously improves AI models through reinforcement learning. Together, these systems provide a holistic approach to web application testing and maintenance.

The invention discloses a chip parameter verification method and device, equipment and a storage medium. The chip parameter verification method comprises the steps of sampling a to-be-tested parameter space of a chip to obtain a parameter point file; performing a regression test on the parameter point file to obtain verification test results, and associating each verification test result with the corresponding parameter point to obtain a data pair set; performing parameter point iteration prediction on the set through a model according to the data; and when it is determined that the predicted parameter points meet the optimization target, taking the predicted parameter points as to-be-applied target parameter points of the chip. The parameter point file is obtained by sampling from the to-be-tested parameter space, and the sampling result is used for the regression verification test, so that the number of tasks needing to be executed is reduced, the overall verification investment is reduced, fitting and prediction are carried out through the model according to the verification test result, the coupling effect and hidden defects among parameters are conveniently found, and the verification efficiency is improved. And the accuracy of the determined target parameter is improved.

A diversified validation test suite application (DVTSA) for a generative AI powered tool or large language model (LLM) tool includes at least first, second, and third control logics. The first control logic receives a seed test input or user input, analyzes the seed test input or user input, and extracts key elements for variations. The second control logic performs a coverage measurement of outputs of the first control logic. The third control logic causes a human validator to evaluate outputs of the second control logic relative to predefined coverage metrics and selectively and continuously iterate to cause outputs of the second control logic to increase LLM tool input robustness and output robustness from a first level to a second level greater than the first level, in both production and pre-production LLM tool processes.

This disclosure describes systems, methods, and devices related to enhanced validation of video codecs. A device may receive validation results for a video codec using a first computer programming language, the validation results indicative of invocations of functions and conditions of the code; identify, from the validation results, a first validation test that invoked a first function or condition of the code; identify, from the validation results, a second validation test that invoked the first function or condition of the code; determine, from the validation results, that the first validation test and the second validation test overlap in invoking the first function or condition of the code using the first computer programming language; and generate, based on the overlap, a first subset of the validation tests with which to validate code of the video codec using a second computer programming language.

The present application provides a method and related equipment for evaluating the application level of automated testing. The method includes: obtaining multiple test processes of automated testing applications; performing script mapping on each test process, and determining the verification automation rate of each test process based on the script mapping results; calculating the maximum automation rate of all test processes based on the verification automation rate of each test process; constructing a verification test statistics table based on the verification automation rate, maximum automation rate and test data of the verification test of each test process; performing actual testing on each test process, and calculating the actual automation rate of each test process in the actual test within a predetermined time period, and constructing an actual test statistics table based on the actual automation rate of each test process and the test data of the actual test; determining the evaluation results based on the verification test statistics table and the actual test statistics table. It can accurately and truly reflect the application level of automated testing.

The invention relates to the technical field of embedded systems, in particular to a factory test detection method and system for firmware burning. According to the method, firmware burning is carried out on a terminal to be tested, whether firmware burning is complete or not is detected in real time during burning, and when it is detected that firmware burning is complete, a factory test trigger signal is sent to a control end; after receiving the factory test trigger signal, the control end tests the terminal which completes firmware burning by a layered test method; and after the test is completed, generating a corresponding test report, combining the MAC address of the terminal, the test timestamp generated during the test and the CRC check value to generate a data identifier, binding the data identifier with the test report, and storing the data identifier and the test report. By means of the mode, when firmware burning is completed, the factory test trigger signal can be automatically sent to the control end, follow-up factory test is carried out, and therefore full-automatic closed-loop control over burning, verification and testing is achieved.

The invention discloses an automatic generation method of an API process scene based on a gateway and a large model, and relates to the technical field of API testing. The method comprises the steps of marking and executing a test case, capturing and verifying gateway data, exporting a JMX test script, exporting request response details, intelligently analyzing a large model, storing returned content as a standard JMX file, and executing verification. Through cooperative work of the gateway and the large model, automatic capture, data association analysis and test script generation of an API test scene are realized, the generation time of the API test script is shortened from an hour level to a minute level, and the efficiency is improved by more than 10 times; non-professionals can generate complex test scripts through simple operation, and dependence on professional testers is reduced; a large model automatically analyzes data association, and omission and errors caused by manual analysis are avoided; full-process automation from interface calling and capturing to test script generation is achieved, and tool switching is reduced.

A computer implemented method of generating a software service for providing required software functionality can include accessing a software component having functionality including and exceeding the required functionality; defining verification test for verifying that the software component includes the required functionality; applying a genetic algorithm to the software component to iteratively adapt the software component over a plurality of generations, wherein each generation of the software component is adapted by removal of one or more portions of the software component of a preceding generation, wherein the adaptation for a generation is selected from a set of candidate adaptations based on a determination of a fitness of the component so adapted, the fitness being determined by the verification test, wherein the iteration of the genetic algorithm ceases in response to a stopping condition such that, on cessation, the latest generation of the software component constitutes the software service.

A server system sends, via a linearly ordered communication orbit, to computational machines at a first subset of nodes in a computer network, a set of local environment verification tests and a set of mappings that map results of the local environment verification tests into a set of risk scores. Requests sent by the server system cause the computational machines at the plurality of nodes to: locally evaluate the set of local environment verification tests to produce test results, and locally map the test results using the set of mappings into a set of risk scores. Queries sent by the server cause the computational machines at the plurality of nodes to return to the server system at least a portion of the test results and risk scores. The server, identifies, based on the received test results and risk scores, computational machines and / or control categories having risk scores satisfying predefined criteria.

According to the test method for the high-low priority scheduling mechanism of the A664 switch, a minimum test environment is established, an A664 tester with four physical ports is used, and verification cases of high-priority data frame priority forwarding, priority data integrity and the number of high-low priority buffer areas in a congestion scene are designed. The integrity and accuracy of high-low priority transmission function verification are ensured, and the problem of verification test of the high-low priority working mechanism of the A664 network in the prior art is effectively solved. The method is high in universality and can be suitable for various A664 network devices and application scenes.