TTFC network clock synchronization system and method based on IRIG-B code

Abstract

The invention discloses a TTFC network clock synchronization system and method based on an IRIG-B code. The problem to be solved is clock synchronization among nodes in the TTFC network. According to the technical scheme, the method is applied to the electronic equipment comprising a processor and a universal flash memory TTFC, corresponding clock information and data information are transmitted through a clock line and a data line respectively, a clock synchronization protocol of the TTFC is configured, and the transmission mode of the clock synchronization protocol is a serial transmission mode; in response to a clock creation request for each network node, a time code is determined. According to the invention, the clock bus is designed to be separated from the data bus, so that the conflict between the clock at the sending end and the data is avoided in design. Furthermore, a simple, universal and standard IRIG-B code is adopted as a clock synchronization mode, complex design is avoided, and clock synchronization can be achieved based on the FPGA. The scheme is more suitable for a time-sensitive network, the jitter during data transmission is reduced, and meanwhile, the design implementation mode is simplified.

Description

Technical field: [0001] The invention relates to the field of electronic technology, in particular to a TTFC network clock synchronization system and method based on IRIG-B codes. Background technique: [0002] Fiber Channel (FC) has become the first choice for the new generation of avionics network due to its characteristics of high bandwidth, low delay, and strong anti-electromagnetic interference. In order to further meet the time-sensitivity requirements of avionics networks, time-triggered fiber channel networks (TTFC) are proposed. [0003] In the TTFC network, all nodes are scheduled according to a unified time system. Therefore, in a TTFC network, the synchronization between network nodes is very important. In the TTFC network protocol, synchronization between devices can be performed through the clock synchronization primitive or the AS6802 protocol. However, this approach has disadvantages. Typically, the clock synchronization network and the data transmission ...

AI Technical Summary

Problems solved by technology

However, this approach has disadvantages

Typically, the clock synchronization network and the data transmission network share the physical bus, which will result in only data signals or clock synchronization signals being transmitted at the same time, resulting in certain bandwidth conflicts

[0004] The problem to be solved by the present invention is the problem of clock synchronization between each node in the TTFC network

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