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Resistive random access memory and manufacturing method thereof

A resistive random access memory technology, applied in the direction of electric solid-state devices, circuits, electrical components, etc., can solve the problems of large available space, unfavorable miniaturization of memory devices, complex circuit design, etc.

Pending Publication Date: 2021-07-06
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, such a method requires complex circuit design, greatly increasing the complexity of the manufacturing process, production time and production cost
Furthermore, this additional control circuit will also occupy a large available space, which is not conducive to the miniaturization of memory devices.

Method used

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  • Resistive random access memory and manufacturing method thereof
  • Resistive random access memory and manufacturing method thereof
  • Resistive random access memory and manufacturing method thereof

Examples

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Embodiment Construction

[0037] In order to make the purpose, features and advantages of the present invention more comprehensible, preferred embodiments are listed below and described in detail in conjunction with the accompanying drawings.

[0038] Figure 1A to Figure 1D It is a schematic cross-sectional view corresponding to each step of manufacturing the resistive random access memory 100 in some embodiments of the present invention. Please refer to Figure 1A , forming an interlayer dielectric layer 103 on the substrate 101 . The material of the substrate 101 may include a bulk semiconductor substrate (eg, a silicon substrate), a compound semiconductor substrate (eg, a Group IIIA-VA semiconductor substrate), a silicon on insulator (SOI) substrate, and the like. The substrate 101 can be a doped or undoped semiconductor substrate. In some embodiments, the substrate 101 is a silicon substrate. The interlayer dielectric layer 103 can be a suitable insulating material, such as nitride, oxide or ox...

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Abstract

The invention provides a resistive random access memory and a manufacturing method thereof. The resistive random access memory comprises an interlayer dielectric layer, a first bottom contact structure and a second bottom contact structure which are formed on a substrate. The first memory cell is on the first bottom contact structure. The first memory cell includes a first bottom electrode layer, and the first bottom electrode layer includes a first conductive region. The pattern of the first conductive region vertically projected on the first bottom contact structure is a first projection pattern. A second memory cell is on the second bottom contact structure. The second memory cell includes a second bottom electrode layer, and the second bottom electrode layer includes a second conductive region. The pattern of the second conductive region vertically projected on the second bottom contact structure is a second projection pattern. The second projection pattern is different from the first projection pattern. According to the invention, on the premise of not increasing the complexity of the manufacturing process, the production cost and the production time, the disorder degree of the read current can be greatly increased.

Description

technical field [0001] The present invention relates to a memory device, and in particular to a resistive random access memory for improving the read current randomness and a manufacturing method thereof. Background technique [0002] In the prior art resistive random access memory (RRAM), a plurality of memory cells are included in an array region, and each memory cell includes a patterned bottom electrode layer, a resistance switching layer and a top electrode layer. When a forming voltage or a writing voltage is applied to the memory cell, the oxygen ions will be driven by the voltage to leave the resistance switching layer. The equivalent positive-valent oxygen vacancies left in the resistance switching layer form conductive paths (or conductive filaments), thereby converting the resistance switching layer from a high-resistance state to a low-resistance state. When an erase voltage is applied, the oxygen ions return to the resistive switching layer and combine with equ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00H01L27/24
CPCH10B63/80H10N70/841H10N70/011
Inventor 林孟弘吴伯伦许博砚童盈辅陈汉修
Owner WINBOND ELECTRONICS CORP
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