Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for managing JTAG interface chip, server and medium

An interface chip and server technology, applied in the server field, can solve the problems of area occupation, increase of server production cost, etc.

Pending Publication Date: 2021-07-30
SHANDONG YINGXIN COMP TECH CO LTD
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But in this way, a chip needs a connector, so that the area on the motherboard is occupied by a large amount of connectors, and increases the cost of server production

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for managing JTAG interface chip, server and medium
  • Method for managing JTAG interface chip, server and medium
  • Method for managing JTAG interface chip, server and medium

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0038] Such as figure 1 As shown, the chips with the JTAG interface in the existing servers are generally connected to the connector provided on the main board by the chip, and then the PC end is connected to the connector through the USB interface, and the described The program is burned into the chip, so as to realize the FW update or debug of the chip with the JTAG interface. Among them, figure 1 The MB in the figure means the motherboard, and the notebook means the PC side. Ho...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a method for managing a JTAG interface chip through a BMC, a server and a medium, wherein the method comprises the following steps: when the BMC obtains a chip management instruction, outputting a preset effective enable signal through a first universal input / output pin of the BMC, and outputting a selection signal through a second universal input / output pin of the BMC; receiving a preset effective enable signal through an enable pin on the multiplexer, receiving a selection signal through a selection pin on the multiplexer, and conducting a first JTAG interface of the BMC to a second JTAG interface on a target JTAG interface chip in the JTAG interface chips according to a conduction relationship corresponding to the selection signal; and transmitting the chip management instruction to a second JTAG interface on the target JTAG interface chip through a first JTAG interface of the BMC. Therefore, the JTAG interface chip can be conveniently managed through the BMC, and the cost of the server is reduced.

Description

technical field [0001] The present application relates to the technical field of servers, in particular to a method for managing JTAG interface chips through a BMC, a server and a medium. Background technique [0002] Today's server design needs to meet diverse requirements, so more and more devices need to be supported. Most of the chips with JTAG (Joint Test Action Group, Joint Test Working Group) interface on the motherboard and most PCIe (Peripheral Component Interconnect Express, peripheral component interconnection standards) devices can update the FW (firmware, firmware) through JTAG. ) or debug, such as CPU (central processing unit, central processing unit), CPLD (Complex Programming logic device, complex programmable logic device), FPGA (Field Programmable Gate Array, field programmable logic gate array) and so on. [0003] Such as figure 1 As shown, the chips with the JTAG interface in the existing servers are generally connected to the connector provided on the ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38G06F1/24G06F13/42
CPCG06F13/385G06F1/24G06F13/4282G06F2213/0026
Inventor 卢彦丞
Owner SHANDONG YINGXIN COMP TECH CO LTD