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Test method, device, medium and equipment for verifying signal direction matching

A test method and technology for verifying signals, which are applied in the field of testing to verify that signals go to code matching, can solve problems such as comparison errors, consuming a lot of time and energy, and simulation time, saving verification time and test time. and effort, speed, and test coverage

Active Publication Date: 2021-10-29
EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For the wiring direction of each signal in each circuit, it is necessary to configure the code configuration. After the code matching is successful, the code stream can be generated and the corresponding work can be performed. Where should each wiring direction be configured and what value should be configured? It is necessary for the tester to compare the configuration files one by one. If the tester manually compares the wiring direction of each signal, it will consume a lot of time. time and energy, and manual comparison is likely to be wrong, even if the simulation can verify whether each value is correctly matched, but from the perspective of execution time, the simulation will take a lot more time

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  • Test method, device, medium and equipment for verifying signal direction matching
  • Test method, device, medium and equipment for verifying signal direction matching
  • Test method, device, medium and equipment for verifying signal direction matching

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Embodiment Construction

[0031] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0032] The following provides a specific embodiment of a test method for verifying signal direction matching of the present invention, including the following steps:

[0033] step 1 ′ : Read the CASE file storing the circuit path and the top-level entity name, and find the signal routing file path address and the matching file path address corresponding to the top-level entity and the circuit path address according to the circuit path and the top-level entity name in the CASE file;

[0034] step 2 ′ : Judgin...

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Abstract

The present invention provides a test method, device, medium and equipment for verifying signal routing and coding. The wiring node information of all signals is obtained by analyzing the signal routing file to be verified; code command list; set the command file path address and the log file path address generated by executing the command file in the code matching execution file called when executing code matching; execute the code matching execution file, find the actual code matching value according to the log file, and set The actual matching value is compared with the matching expected value in the command list. If the comparison is consistent, the matching is correct, and if the comparison is inconsistent, the matching fails. The inconsistent circuit path address and matching value are written into the result file and output. By using the idea of ​​software verification, batch automatic verification of circuits is realized, which saves a lot of verification time, saves the test time and effort of testers, and improves the speed of code matching verification and test coverage.

Description

technical field [0001] The invention belongs to the technical field of programmable logic devices, and in particular relates to a test method, device, medium and equipment for verifying signal direction matching. Background technique [0002] The main function of the FPGA EDA (Field-Programmable Gate Array Electronics DesignAutomation, field programmable gate array electronic design automation) tool is to convert the specific circuit design into a netlist file (the netlist file is a file describing the connection relationship of the circuit, generally It is a text file. Simply put, it translates the schematic diagram into a text file. The file will contain the device's label, package, and connection relationship. This file is imported into the PCB (Printed Circuit Board, printed circuit board) editor. The corresponding package will be taken out from the package library, and the corresponding label and connection relationship will be given), and then the netlist file will be ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/347G06F11/22
CPCG06F30/347G06F11/2205G06F11/2273G06F11/2289
Inventor 夏燕徐维涛
Owner EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD