Polycrystalline silicon layer, manufacturing method thereof and semiconductor device

Abstract

The invention provides a polycrystalline silicon layer, a manufacturing method thereof and a semiconductor device. The manufacturing method comprises the following steps: depositing an amorphous silicon layer on a substrate; injecting predetermined ions into the amorphous silicon layer at a predetermined temperature so as to break Si-H bonds in the amorphous silicon layer and enable H to overflow out of the amorphous silicon layer; and annealing the amorphous silicon layer to form a polycrystalline silicon layer. According to the method, Si-H bonds in the amorphous silicon layer are broken in an ion implantation mode, so that H overflows out of the amorphous silicon layer, and the defects of bubbles or peeling and the like caused by H aggregation due to relatively high temperature in the subsequent annealing process are reduced or avoided, so that the defects formed in the annealing process of the amorphous silicon layer in the prior art are reduced.

Description

technical field [0001] The present application relates to the field of semiconductors, in particular, to a polysilicon layer, a manufacturing method thereof, and a semiconductor device. Background technique [0002] In the 3DNA NAND FLASH of the X-tacking structure, after the storage unit is formed, a channel layer of polysilicon is generally formed on it, so that the channel layer is in contact with the polysilicon in the storage unit. [0003] In the prior art, the amorphous silicon layer is generally formed at a low temperature of 420-450°C; then, the amorphous silicon is converted into polysilicon through an annealing process, thereby forming the conductive channel of the polysilicon layer, and finally realizing the programming and processing of the device. erase. [0004] A large number of Si-H bonds will remain in the amorphous silicon layer formed by the above scheme, and this bond will break during the subsequent annealing process, and H will accumulate, form bubble...

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Problems solved by technology

[0004] A large number of Si-H bonds will remain in the amorphous silicon layer formed by the above scheme, and this bond will be broken during the subsequent annealing process, and H will accumulate, form bubbles, and even hydrogen explosion will occur, resulting in the formation of the amorphous silicon layer. Partial peeling, and such defects such as bubbles or peeling often appear at the interface between the memory unit and the polysilicon layer, which affects the electrical conductivity of the device, thus making the performance of the device poor

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