Power factor correction device and control chip

Abstract

The invention discloses a power factor correction control chip, which comprises a power supply and bias module, an oscillator module, a nonlinear gain module, a comparator CMP, a current operational amplifier OTA1, a driving module and a voltage operational amplifier OTA2, wherein an auxiliary power supply end is connected with the power supply and bias module through a VIN pin; the negative input end of the current operational amplifier OTA1 is connected with an IS pin, the output end of the current operational amplifier OTA1 is connected with the nonlinear gain module, the negative input end of the voltage operational amplifier OTA2 is connected with a VS pin, the output end of the voltage operational amplifier OTA2 is connected with the nonlinear gain module, the nonlinear gain module outputs two paths of signals to the positive and negative input ends of the comparator CMP respectively, one path of signal VP is controlled reference voltage, and the other path of signal VM is a controlled slope signal. Through double-loop control of the voltage loop and the current loop, the PFC technology can be realized without specially designing a complex multiplier structure, the design of a control IC is simplified, IC packaging pins are reduced, the packaging volume is reduced, and a plurality of peripheral devices are saved.

Description

technical field [0001] The invention relates to the technical field of power management, in particular to a power factor correction control chip. Background technique [0002] With the development of power electronics technology, the power density of electric energy conversion devices has been greatly improved, and the volume and weight of the devices have become smaller and smaller. When a large number of power electronic devices are connected to the power grid, they need to convert AC power into DC power. Various devices are bound to generate harmonics when they are used. Harmonic currents flood into the public power grid, which will cause the voltage waveform of the power grid to be distorted and pollute the power grid. . [0003] In order not to pollute the power grid, it is usually necessary to modify the design of the electronic equipment to reduce the harmonic content of the input current introduced by the electronic equipment. Because of this, power factor correcti...

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Problems solved by technology

[0006] However, the existing technology needs to design a multiplier, which increases the difficulty of design. Due to the use of a multiplier, two pins, VRMS and MULT, need to be added, which increases the size of the package, and the VRMS pin needs a sampling network to To realize the sampling of the input voltage Vbus, the overall solution is relatively difficult in terms of volume and design. People hope to find a PFC solution with a simpler peripheral and smaller volume.

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