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Instruction extraction device, processor, board card and instruction extraction method

An instruction fetching and processor technology, applied in the field of computing, can solve problems affecting the efficiency of instruction fetching, and achieve the effects of improving efficiency, increasing computing speed, and improving instruction fetching efficiency

Pending Publication Date: 2021-12-28
SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some scenarios, in order to improve the efficiency of fetching instructions (referred to as "instruction fetch"), the CPU often performs hardware prefetch operations during backfilling, that is, in addition to backfilling the currently unhit instructions (referred to as "backfill instructions"), it will also Several instructions following the backfill instruction are also backfilled into the cache, which will affect the efficiency of instruction fetching

Method used

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  • Instruction extraction device, processor, board card and instruction extraction method
  • Instruction extraction device, processor, board card and instruction extraction method
  • Instruction extraction device, processor, board card and instruction extraction method

Examples

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Embodiment Construction

[0017] The solution disclosed in the present disclosure provides a hardware architecture for accelerating instruction fetching. When the hardware architecture is implemented in a command fetching device, the instruction fetching device includes a backfill request circuit configured to detect whether a cache miss event occurs during the instruction fetching device sending out instructions, and when the cache miss event occurs , send a backfill request to the external memory. In one embodiment, the instruction fetching device of the present disclosure further includes an instruction fetch circuit, which is configured to receive backfill instructions in batches from the external memory as a response to the backfill request, and during the interval of batch reception, the received The backfill instruction of the , for example, is sent to the decoder. With the help of the instruction fetching scheme of the present disclosure, instruction fetch operations can be efficiently perform...

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PUM

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Abstract

The invention discloses an instruction extraction device, a processor, an integrated circuit chip, a board card, electronic equipment and a method for extracting instructions. In one embodiment, an instruction fetch device can be included in a computing device, the computing device can be included in a combined processing device, and the combined processing device can further comprise a universal interconnection interface and other processing devices. The computing devices interact with other processing devices to jointly complete the computing operation specified by the user. The combined processing device can further comprise a storage device, and the storage device is connected with equipment and the other processing devices and used for storing data of the equipment and the other processing devices. According to the scheme disclosed by the invention, the instruction fetching efficiency of various computing fields including the artificial intelligence field can be improved, so that the operation is accelerated, and the overall overhead and cost of the operation are reduced.

Description

technical field [0001] The present disclosure relates generally to the field of computing. More specifically, the present disclosure relates to an instruction fetching device, a processor, an integrated circuit chip, a board, electronic equipment, and a method for fetching instructions. Background technique [0002] In a traditional central processing unit (“CPU”), when a cache miss event occurs, instructions need to be backfilled from a dynamic random access memory (“DRAM”) to the cache before continuing to fetch instructions from the cache for example translation. Code and other operations. In some scenarios, in order to improve the efficiency of fetching instructions (referred to as "instruction fetch"), the CPU often performs hardware prefetch operations during backfilling, that is, in addition to backfilling the currently unhit instructions (referred to as "backfill instructions"), it will also Several instructions following the backfill instruction are also backfille...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
CPCG06F9/3802
Inventor 不公告发明人
Owner SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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