High-efficiency PSoC chip based on SiP technology and packaging structure thereof
A chip packaging structure and high-efficiency technology, applied in CAD circuit design, electrical components, circuits, etc., can solve the problems of low integration, large overall area, and difficulty in resisting electromagnetic interference, achieve strong flexibility, and increase storage rate , taking into account the effect of bonding strength and heat dissipation performance
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[0021] The technical solutions of the present invention will be described in detail below, but the protection scope of the present invention is not limited to the embodiments.
[0022] In order to make the content of the present invention more obvious and understandable, the following in conjunction with the attached Figure 1-Figure 4 and specific implementation methods for further description.
[0023] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0024] In this embodiment, a PSoC chip composed of a processor bare core 1, four DDR bare cores, two Flash bare cores, a dual power bus transceiver bare core 8, a power supply chip 9 and several RC discr...
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