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Method for sealing wafer by using carrier plate

A technology of wafers and discs, which is applied in the field of sealing wafers with discs, can solve the problems of not meeting the requirements of wafer high-temperature process, poor high-temperature resistance of adhesives, material limitations, etc., to prevent movement or falling, Low production cost and the effect of overcoming temperature limitations

Pending Publication Date: 2022-03-15
绍兴同芯成集成电路有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the glass carrier needs to be temporarily bonded to the wafer with the help of an adhesive, and the adhesive has poor high temperature resistance and cannot meet the requirements of the high temperature process during wafer processing. If permanent bonding is used, there are material limitations

Method used

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  • Method for sealing wafer by using carrier plate
  • Method for sealing wafer by using carrier plate
  • Method for sealing wafer by using carrier plate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0031] Such as Figure 1-4 As shown, a method for sealing a wafer by using a carrier plate, the surface of the carrier plate is provided with a groove, and the inner wall of the groove is symmetrically provided with tenons, and the method for sealing the wafer includes the following steps:

[0032] S1. Open a groove symmetrically on the edge of the wafer to be processed by etching or mechanical grinding, and then put the wafer into the groove on the surface of the carrier, and the groove is matched with the tenon;

[0033] S2. Deposit SiO on the surface of the wafer and the carrier plate by CVD 2 blocking layer;

[0034] S3. Grinding SiO by CMP 2 Plug the layer to the wafer surface to planarize the wafer surface;

[0035] S4. After the front process of the wafer is completed, SiO is removed by plasma etching 2 After the plugging layer is removed, the wafer can be released and taken out for subsequent processes.

Embodiment 2

[0037] Such as Figure 5-7 As shown, a method for sealing a wafer by using a carrier plate, the surface of the carrier plate is provided with a groove, and the inner wall of the groove is symmetrically provided with tenons, and the method for sealing the wafer includes the following steps:

[0038] S1. Open a groove symmetrically on the edge of the wafer to be processed by etching or mechanical grinding, and then put the wafer into the groove on the surface of the carrier, and the groove is matched with the tenon;

[0039] S2, forming an SOG blocking layer after spin-coating on the surface of the wafer and the carrier plate;

[0040] S3, grinding the SOG plugging layer to the wafer surface by CMP, so that the wafer surface is planarized;

[0041] S4. After the front-side process of the wafer is completed, the SOG blocking layer is removed by plasma etching, and the wafer can be released and taken out for subsequent process.

Embodiment 3

[0043] Such as Figure 8-10 As shown, a method for sealing a wafer by using a carrier plate, the surface of the carrier plate is provided with a groove, and the inner wall of the groove is symmetrically provided with tenons, and the method for sealing the wafer includes the following steps:

[0044] S1. Open a groove symmetrically on the edge of the wafer to be processed by etching or mechanical grinding, and then put the wafer into the groove on the surface of the carrier, and the groove is matched with the tenon;

[0045] S2, coating the surface of the wafer and the carrier plate with polyimide and curing to form a blocking layer;

[0046] S3. Grinding the polyimide plugging layer to the wafer surface by CMP to planarize the wafer surface;

[0047] S4. After the front-side process of the wafer is completed, the plugging layer is removed by dissolving with an organic solvent, and the wafer can be released and taken out for subsequent process.

[0048] Such as Figure 11 As...

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Abstract

The invention discloses a method for sealing a wafer by using a carrying disc, a groove is formed in the surface of the carrying disc, at least one clamping tenon is arranged on the inner wall of the groove, the method for sealing the wafer comprises the following steps: S1, at least one clamping groove is formed in the edge of the wafer to be processed, then the wafer is placed in the groove in the surface of the carrying disc, and the clamping groove is matched with the clamping tenon; s2, depositing or coating a plugging layer on the surfaces of the wafer and the carrier plate; s3, the blocking layer is ground to the surface of the wafer through CMP, so that the surface of the wafer is flattened; and S4, removing the blocking layer after the front surface process of the wafer is completed, and releasing and taking out the wafer for a subsequent process. The wafer is limited through cooperation of the tenons on the carrying disc and the clamping grooves of the wafer, meanwhile, the plugging layers are deposited or coated on the surfaces of the wafer and the carrying disc, double limiting of the wafer in the carrying disc is achieved, and the wafer is effectively prevented from moving or falling off in the machining process.

Description

technical field [0001] The invention relates to the technical field of wafer processing, in particular to a method for sealing a wafer by using a carrier plate. Background technique [0002] Wafer refers to the substrate (also called substrate) on which semiconductor transistors or integrated circuits are manufactured. Because it is a crystalline material, its shape is round, so it is called a wafer. Substrate materials include silicon, germanium, GaAs, InP, GaN, etc. Since silicon is the most commonly used, if the crystalline material is not specified, it usually refers to silicon wafers. In the existing wafer processing process, it is often necessary to process a bonded glass carrier to provide stress support. However, the glass carrier needs to be temporarily bonded to the wafer with an adhesive, and the adhesive has poor high temperature resistance and cannot meet the requirements of the high temperature process during wafer processing. If permanent bonding is used, t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/683
CPCH01L21/6835H01L2221/68327
Inventor 严立巍符德荣陈政勋
Owner 绍兴同芯成集成电路有限公司
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