Method for optimizing surface flatness of silicon wafer
A technology of silicon wafer surface and optimization method, used in grinding machine tools, manufacturing tools, grinding/polishing equipment, etc., can solve problems such as affecting the quality of silicon wafers and poor flatness of the silicon wafer surface, and achieve the effect of optimizing the flatness
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Embodiment 1
[0028] Polish the 12-inch silicon wafer 3, the specifications of the silicon wafer 3 are: P, the resistivity is 15-20Ω.cm, and the thickness is 775 microns.
[0029] In this embodiment, a Micro single-sided polishing machine is used to polish the silicon wafer 3. The polishing process includes a rough polishing stage, a medium polishing stage, and a fine polishing stage. The polishing parameters of the above three stages are set as follows:
[0030] 1) Coarse polishing stage: the polishing liquid uses coarse polishing liquid A, medium polishing liquid B, alkaline chemical agent D and ultrapure water. Each rough polishing stage is divided into 5 steps, and the polishing parameters are set as follows:
[0031]
[0032] Described coarse throwing liquid A and medium throwing liquid B are made up of colloidal silica and water (deionized water or ultrapure water), and the volume ratio of colloidal silica and deionized water contained in described rough throwing liquid A is 1:7, w...
Embodiment 2 and Embodiment 3
[0040] The difference between Embodiment 2 and Embodiment 3 and Embodiment 1 is that the polishing time, the volume ratio of the polishing liquid components and the flow rate of the polishing liquid in each step of the polishing stage are different. For the specific differences, see Table 1:
[0041] Table 1 Example 2 and Example 3 polishing stage polishing time, polishing liquid composition, polishing liquid composition volume ratio and polishing liquid flow rate
[0042]
[0043] Eight sample silicon wafers 3 of Example 2 were randomly selected, and their flatness was tested. The testing equipment was wafersight2+ of KLA Company of the United States. The testing results are shown in Table 2.
[0044] Eight sample silicon wafers 3 of Example 3 were randomly selected, and their flatness was tested. The testing equipment was wafersight2+ of KLA Company of the United States. The testing results are shown in Table 2.
[0045] It should be noted that the polishing stage of each e...
Embodiment 4
[0050] In order to further detect the flatness of the surface of the polished silicon wafer 3 of the present invention, the present embodiment adopts the method of embodiment 1, embodiment 2 or embodiment 3 to polish the silicon wafer 3, and randomly select 2-3 groups every day for 23 days Sample silicon wafers 3 were tested, each group of samples consisted of 8 silicon wafers 3, a total of 544 silicon wafers 3, the testing equipment was wafersight2+ of KLA company in the United States, the testing results can be found in Figure 4 and see Figure 5 ,from Figure 4 It can be seen that the fluctuation range of SFQR-Mean of sample silicon wafer 3 is between 1.8nm-7.0nm, from Figure 5 It can be seen that the fluctuation range of ESFQR-Mean of the sample silicon wafer 3 is between 10nm-34nm, while the fluctuation range of the SFQR-Mean of the silicon wafer 3 polished by the existing process is generally between 23nm-50nm, and its ESFQR- The fluctuation range of Mean is generall...
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Abstract
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