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Leveling method of exposure wafer and photoetching exposure method

A leveling and wafer technology, applied in microlithography exposure equipment, photolithography exposure equipment, optics, etc., can solve problems such as wafer surface topography changes

Pending Publication Date: 2022-05-31
INST OF MICROELECTRONICS CHINESE ACAD OF SCI +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For this reason, the application proposes a leveling method for exposing wafers and a method for photolithography exposure to solve the problem of surface topography changes of wafers

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  • Leveling method of exposure wafer and photoetching exposure method
  • Leveling method of exposure wafer and photoetching exposure method
  • Leveling method of exposure wafer and photoetching exposure method

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Embodiment Construction

[0017] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present disclosure.

[0018] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, s...

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Abstract

The invention relates to the field of semiconductor manufacturing, in particular to a leveling method of an exposed wafer and a photoetching exposure method, and the method comprises the following steps: obtaining original leveling data of different patterns on the wafer; obtaining leveling data of different patterns according to the positions of the design patterns on the mask; and compensating the original leveling data according to the leveling data. According to the leveling method for the exposed wafer in the embodiment of the invention, the performance of wafer leveling in the wafer exposure process can be improved, and the exposure efficiency is improved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, in particular to a leveling method for exposing wafers and a method for lithography exposure. Background technique [0002] In order to manufacture various products (such as DRAM, NAND, VLSI, etc.), the photolithography process shrinks the designed layout (LAYOUT), and then coats the photoresist (PHOTORESIST) on the wafer for forming. The specific forming process is: draw a pattern on the mask, pass the light through the pattern on the mask, and after diffraction, the diffracted light will form a planar suspended pattern, which will pass through many lenses. Then shrink and transfer to the wafer, the photosensitive material will react on this pattern, and then through chemical reaction, the pattern of the mask will be formed on the wafer. The suspended pattern has a plane, which must be consistent with the plane of the wafer. For coincidence, generally speaking, the leveling ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/20
CPCG03F7/70733
Inventor 田范焕梁时元贺晓彬李亭亭杨涛刘金彪
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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