Trench gate semiconductor device and preparation method thereof

Abstract

The invention relates to a trench gate semiconductor device and a preparation method thereof. The trench gate semiconductor device sequentially comprises a drain metal region (122), a substrate region (101) of a first conduction type, an epitaxial region (102) of the first conduction type, an active region (100) and a source metal region (121) from bottom to top, the active region (100) comprises a shielding region (107) of a second conduction type located at the bottom of a trench (106), and a channel is arranged in the shielding region (107) of the second conduction type. According to the trench gate semiconductor device, a channel is also formed in the shielding region of the second conduction type at the bottom of the trench of the trench gate semiconductor device, conductive channels can be increased, the channel density of the device is improved, the on-resistance of the trench gate semiconductor device is effectively reduced, meanwhile, the channel in the shielding region is prepared by adopting a self-alignment process, and the length of the channel is accurately controlled.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductor preparation, and in particular, to a trench gate semiconductor device and a preparation method thereof. Background technique [0002] Trench gate semiconductor devices have become the future development direction due to their smaller on-resistance. However, taking SiCMOSFET as an example, due to the high electric field strength that SiC material can withstand, and the high dielectric constant ratio between SiC and its gate dielectric material (for example, compared with the commonly used gate dielectric material SiO 2 ratio, about 2.5), therefore, when the SiC MOSFET device is subjected to withstand voltage, the electric field strength in the gate dielectric is usually larger. [0003] In the related art, the trench gate semiconductor device can effectively shield the electric field by forming a P-type (or N-type) shielding region at the bottom of the trench to reduce the electric ...

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Problems solved by technology

However, the introduced P-type (or N-type) shielding region will form a Junction Field-Effect Transistor (JFET) structure together with the P-type (or N-type) base region, thereby increasing the conduction of the device resistance

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