Semiconductor storing device and semiconductor integrated circuit

Abstract

In a semiconductor memory device, a precharge potential for non-selected bit lines among a plurality of bit lines, supplied by a HPR voltage source, is set at a value (for example, 1 / 2 Vcc=0.4 V) lower than the power supply voltage Vcc (low voltage in the range of 0.5 V to 1.2 V; for example, 0.8 V) determining the high-level side potential of data stored in a memory cell. A potential for non-selected word lines among a plurality of word lines, supplied by a NWL voltage source, is set at a predetermined negative potential (for example, - 1 / 4 Vcc=-0.2 V). The total of the precharge potential (0.4 V) of non-selected bit lines and the absolute value of the negative potential (-0.2 V) of non-selected word lines is set at a value less than the power supply voltage Vcc (0.8 V). By these settings, gate leakage current and GIDL current can be effectively limited to a small value while realizing effective limitation of OFF leakage current in a plurality of memory cells.

Description

technical field [0001] The present invention relates to a single semiconductor memory device and a semiconductor integrated circuit including the semiconductor memory device, in particular to a high integration and high density with a power supply voltage below 1.2V and a design wire gauge below 0.13 μm for operation at a low voltage A technology that can effectively reduce the leakage current of a transistor when using a device. Background technique [0002] In general, in order to enable a semiconductor memory device to operate at a high speed even at a low voltage, a technique of using a transistor with a low threshold voltage as its constituent transistor is employed. [0003] Under such circumstances, in a low-threshold voltage transistor, a large off-leakage current flows between the source and the drain even when the transistor is off. In order to solve this problem, in the prior art, for example, by setting the word line to a negative voltage or moving the source po...

AI Technical Summary

Problems solved by technology

The above-mentioned existing negative voltage word line driving technology, etc., will further induce the problem of GIDL leakage current, and there is a problem that such a new leakage current cannot be suppressed

[0006] In particular, regarding the leakage current from the bit line, in the output read operation, in determining whether or not the potential of the precharged bit line is drawn from the cell current, when there is a non-negligible amount of leakage current on the bit line relative to the cell current When there is a leakage current, it is difficult to identify whether it is the cell current or the leakage current, which will either prolong the time required for data readout, or cause the problem of misreading data

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