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Wire frame, semiconductor device using such frame and its mfg. method

A manufacturing method and lead frame technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as complex manufacturing process, high cost, and impossibility of miniaturization

Inactive Publication Date: 2006-06-21
III HLDG 12 LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] However, since BGA-type or LGA-type semiconductor devices use a laminated multilayer printed circuit board (carrier) made of ceramic materials and resin materials, there is a problem that the manufacturing process is complicated and the cost is extremely high.
[0013] Also, there is the following problem: even if the Figure 12 and Figure 13 The manufacturing method of the conventional resin-sealed type semiconductor device shown is continued to be used as a manufacturing method of BGA type or LGA type semiconductor device, but since it is necessary to provide a connection support portion for connecting a plurality of bosses as external terminals to the frame before processing , and if more than 3 rows of bosses are set, miniaturization becomes impossible
[0014] In addition, in the conventional method of manufacturing a resin-sealed semiconductor device, the accuracy of mounting on a printed circuit board is lower than that of a surface-mounted semiconductor device such as a BGA type or an LGA type.

Method used

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  • Wire frame, semiconductor device using such frame and its mfg. method
  • Wire frame, semiconductor device using such frame and its mfg. method
  • Wire frame, semiconductor device using such frame and its mfg. method

Examples

Experimental program
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Effect test

Embodiment 1

[0130] Next, Embodiment 1 of the present invention will be described with reference to the drawings.

[0131] figure 1 It shows the bottom surface structure of the lead frame in Example 1 of the present invention, that is, the part including one die pad of the lead frame, and the lead frame is provided with a plurality of die pads of the inner inner lead portion before insulation processing.

[0132] Such as figure 1 As shown, the lead frame 10 has the following parts: a frame part 11; inside the frame part 11, the four corners are supported by the supporting wire part 12 as a connection support part, and on the top ( figure 1 The back side) holds the die pad portion 13 of the semiconductor element; is respectively supported by the peripheral portion of the die pad portion 13, and has a plurality of inner inner lead portions 14A having convex portions 14a on the bottom surface; disposed between the frame portion 11 and the inner inner lead portion 14A While extending inwa...

Embodiment 2

[0155] Embodiment 2 of the present invention will be described below with reference to the drawings.

[0156] Figure 5 (a) and Figure 5 (b) is a resin-sealed semiconductor device according to Example 2 of the present invention, (a) is a plan view, and (b) shows an enlarged cross-sectional structure of (a) on line Vb-Vb. exist Figure 5 (a) and Figure 5 (b), for and figure 2 with image 3 The structural members that are the same as those shown are denoted by the same symbols, and their descriptions are omitted.

[0157] Figure 5 (a) and Figure 5 The resin-sealed semiconductor device 40 of the second embodiment shown in (b) uses the figure 2 The lead frame 10 of the shown embodiment 1 has the same structure as the lead frame, and the inner inner lead portion 14A and the outer inner lead portion 14B are both changed into two columns to form a four-row structure.

[0158] Such as Figure 5 As shown in (b), the resin-encapsulated semiconductor device 40 is composed...

Embodiment 3

[0173] Embodiment 3 of the present invention will be described below with reference to the drawings.

[0174] Image 6 (a) and Image 6 (b) is the lead frame of Example 3 of the present invention, and (a) shows the bottom surface structure including a part of one die pad of the lead frame on which a plurality of bosses before insulation (isolation) processing are provided. Die pad; (b) shows the cross-sectional structure on line VIb-VIb of (a).

[0175] Such as Image 6 (a) and Image 6 As shown in (b), the lead frame 30 includes: a frame portion 31; disposed inside the frame portion 31, on which a die pad portion 33 holding a semiconductor element is held; In three rows, the surface (bottom surface) opposite to the component holding surface has a plurality of inner lead portions 34 as convex portions of bosses.

[0176] Among the plurality of inner wire portions 34 , a part is supported by a frame connection support portion 32A as a first connection support portion exten...

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PUM

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Abstract

A lead frame 10, comprising: a frame portion 11; disposed between the frame portion 11 and an inner inner lead portion 14A, and extending from the frame portion 11 to the inner side, and having a convex portion 14a under the die pad portion 13 a plurality of outer inner lead portions 14B. The inner inner lead portion 14A is insulated from the die pad portion 13 by cutting off the supporting portion of the die pad portion 13 and the inner inner lead portion 14A. Bottom surfaces of the frame portion 11 , the plurality of inner inner lead portions 14A, and the outer inner lead portions 14B are held by an adhesive tape material 20 as a lead holding material. From a single-layer metal plate, it is relatively easy to obtain a small lead frame with a multi-row boss structure, especially with more than 3 rows of bosses.

Description

technical field [0001] The present invention relates to a lead frame for a land grid array (LGA) having a plurality of bosses, which are exposed external terminals arranged in an array on the bottom surface of a package, and a resin-sealed type using the lead frame. Semiconductor devices, and their manufacturing methods. Background technique [0002] In recent years, in order to meet the miniaturization and higher functionality of electronic equipment, there has been an increasing demand for high-density mounting of semiconductor components. Along with this trend, the miniaturization and thinning of resin-encapsulated semiconductor devices, which use molded resin materials to seal semiconductor chips and wires as a whole, are rapidly developing. While pursuing miniaturization and thinning, more pins are desired. [0003] Next, lead frames used in conventional resin-sealed semiconductor devices will be described with reference to the drawings. [0004] Figure 12 Represents...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/495H01L23/50H01L21/48H01L21/56H01L23/31
CPCH01L21/4821H01L21/4828H01L21/566H01L21/568H01L23/3107H01L23/49503H01L23/49548H01L24/28H01L24/32H01L24/45H01L24/48H01L24/73H01L2221/68318H01L2224/29007H01L2224/29111H01L2224/29139H01L2224/29339H01L2224/32014H01L2224/32245H01L2224/45015H01L2224/45144H01L2224/48091H01L2224/48247H01L2224/49433H01L2224/73265H01L2924/01005H01L2924/01006H01L2924/01011H01L2924/01013H01L2924/01015H01L2924/01023H01L2924/01028H01L2924/01029H01L2924/01033H01L2924/01039H01L2924/01046H01L2924/01047H01L2924/0105H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/0132H01L2924/0133H01L2924/12044H01L2924/15747H01L2924/181H01L2924/00014H01L2924/00012H01L2924/01026H01L2924/01083H01L2924/00H01L21/56H01L23/50
Inventor 南尾匡纪川合文彦大广雅彦古市正德佐藤圭则小贺彰福田敏行
Owner III HLDG 12 LLC
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