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EEPROM programming circuit

A technology for programming circuits and writing memory, which is applied in the field of electric erasable memory programming circuits, and can solve the problems of large circuit area, large power consumption, and complex structure.

Inactive Publication Date: 2005-06-29
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Since the traditional EEPROM programming unit circuit includes an independent data register and an independent high-voltage control circuit, the circuit structure of the unit is complicated, and the required area of ​​the circuit is large and the power consumption is large.

Method used

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  • EEPROM programming circuit

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Embodiment Construction

[0009] see figure 1 As shown, the electrical erasable memory programming circuit of the present invention includes six field effect transistors M1-M6, wherein, the field effect transistors M1-M4 are connected to form a static random access memory, and the input terminal of the access memory is the input data terminal ~ D , the output end of the access memory is the voltage output end Q, and one end of the access memory is the high voltage generation output end V HV , the other end is the ground terminal GND, the source and drain of the field effect transistor M6 are respectively connected to the drain of the field effect transistor M1 and the source of the field effect transistor M3, and the drain of the field effect transistor M5 is connected to the drain of the field effect transistor M1 The gates of the field effect transistors M5 and M6 are connected in parallel as the clearing signal terminal clr, and the source of the field effect transistor M5 is connected to the ground...

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Abstract

This invention discloses an electric rubbing and writing memory program circuit, which uses four-field effect tubes M1 to M4 to connect one static random memory. In non-program status, it uses field effect tube M6 to separate the pass between M1 and M3 to avoid the large conversion current in forced conversion. In high voltage conversion, it uses field effect tube M5 and M6 to lock the data in memory. This invention realizes the static random memory device and high voltage conversion function in one circuit.

Description

technical field [0001] The present invention relates to a programming unit circuit of an integrated chip, and more specifically refers to a programming circuit of an electric erasable memory. The power consumption realizes parallel writing of EEPROM storage unit. Background technique [0002] In an integrated chip, a traditional electrically erasable memory (EEPROM) programming unit circuit includes an independent data register and an independent high-voltage control circuit, which perform data temporary storage and high-voltage conversion functions respectively. EEPROM writing is generally carried out in two stages (assuming that EEPROM writes N-bit data at a time, and all units to be written have been erased before that, that is, all current data is set to "1"): 1. The data is input from the serial interface, and after being shifted, it enters the N-bit data register for temporary storage; 2. Under the control of the write signal, the N-bit temporary register outputs diff...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/10
Inventor 王光春
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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