Non-volatile memory, its production and operation

A non-volatile storage, non-volatile technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problem of the inability to effectively improve the integration of components, achieve high electron injection efficiency, and improve integration. , the effect of reducing power loss

Inactive Publication Date: 2006-11-01
POWERCHIP SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] However, memory elements with a split gate structure require a larger area to accommodate the select gate
Therefore, there will be a problem that the integration of components cannot be effectively improved

Method used

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  • Non-volatile memory, its production and operation
  • Non-volatile memory, its production and operation
  • Non-volatile memory, its production and operation

Examples

Experimental program
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Embodiment Construction

[0065] Figure 1A It is a top view showing the non-volatile memory of the present invention. Figure 1B for illustration Figure 1A Structural cross-section along line A-A'. Figure 1C It is a cross-sectional view showing the structure of the memory unit and the switch unit of the present invention.

[0066] Please also refer to Figure 1A , Figure 1B and Figure 1C , the non-volatile memory structure of the present invention is at least composed of a substrate 100, an element isolation structure 102, an active region 104, a plurality of memory cells Q1-Qn, a switch unit 106, conductor spacers 108a, 108b, an insulating layer 110, and a gate interlayer. The electrical layer 112 , the source region 114 and the drain region 116 are formed.

[0067] The substrate 100 is, for example, a silicon substrate, and the substrate 100 can be a P-type substrate or an N-type substrate. The device isolation structure 102 is disposed in the substrate 100 to define an active region 104 . ...

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Abstract

The non-volatile memory unit comprises multi memory cells composed of the selection cell and the memory cell. Said selection cell is formed on the substrate. Said memory cell is formed on a sidewall at the side of selection cell. Said selection cell is composed of a gate electrode and a first dielectric layer formed between the gate electrode and the substrate. Said memory cell is composed of a pair of floating gate electrodes formed on the substrate, a control gate electrode formed on the surface of said floating gate electrode, an inter-gate dielectric layer formed between said floating gate and said control gate, a tunneling dielectric layer formed between said floating gate and the substrate, and a second gate dielectric layer formed between said control gate and the substrate.

Description

technical field [0001] The present invention relates to a memory element, in particular to a non-volatile memory and its manufacturing method and operation method. Background technique [0002] In various memory products, since the electrically erasable and programmable non-volatile memory can store, read, and erase data multiple times, and the stored data will not The advantage of disappearing has therefore become a memory element widely used in personal computers and electronic equipment. [0003] A typical electrically erasable and programmable non-volatile memory is made of doped polysilicon (Polysilicon) to make a floating gate (Floating Gate) and a control gate (Control Gate). Moreover, the floating gate is separated from the control gate by an inter-gate dielectric layer, and the floating gate is separated from the substrate by a tunnel dielectric layer (Tunnel Dielectric Layer). When performing write / erase (Write / Erase) data operations on this memory, by applying a...

Claims

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Application Information

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IPC IPC(8): H01L27/115H01L21/8247H01L27/105H01L29/788
Inventor 毕嘉慧卓志臣魏鸿基
Owner POWERCHIP SEMICON CORP
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