Multi-channel high-speed data processor and processing method

A technology for high-speed data and processing methods, applied in wireless communication, digital transmission systems, security communication devices, etc., can solve problems such as affecting system performance, increasing system overhead, etc., to ensure high-speed operation, relieve overburden, and improve efficiency. Effect

Inactive Publication Date: 2007-01-03
SOUTHEAST UNIV
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

However, if this kind of work is completed by the network processor, it will incr

Method used

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  • Multi-channel high-speed data processor and processing method
  • Multi-channel high-speed data processor and processing method
  • Multi-channel high-speed data processor and processing method

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Embodiment Construction

[0038] The structure and flow of each module of the device of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0039] The device of the invention is a multi-channel high-speed data processing device based on field programmable gate array.

[0040] like figure 1 As can be seen from the shown system architecture of the present invention, the processor specifically includes the following four modules: field programmable gate array hardware module 1, 4 times data rate interface module 2, programmable read-only memory program configuration module 3 and software system module 4; the 4 times data rate interface module 2 includes: internal integrated circuit bus interface 2.1, 4 times data rate interface 2.2, JTAG interface 2.3, peripheral power supply module 2.4, field programmable gate array hardware module 1 through 4 times data rate interface 2.2 Connect the external host, connect with the peripheral power supply module 2.4 ...

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Abstract

A method for processing multichannel high-speed data includes issuing read/write information and data information by network processor and obtaining said information by queue dispatch module, carrying out relevant write operation on buffer area by receiving module after it receives write command from queue dispatch module then sending processed data to frame calibration-sequence module and sending calibrated data to data buffer storage module, writing data in buffer area and outputting data by operating buffer area. The processor of multichannel high-speed data is also disclosed.

Description

technical field [0001] The device of the invention is a high-speed data processing device in the field of wireless network security, which uses a field programmable gate array (FPGA) as a basic platform, and is a multi-channel high-speed data processing system. Background technique [0002] The application of services such as high-speed packet data, multimedia data and Internet is driving the upgrade of Code Division Multiple Access (CDMA) from IS-95 to CDMA2000 1X. The International Organization for Standardization 3GPP2 has formulated the relevant standards of CDMA2000 1X packet data network, and adopted the existing work results of IETF in mobile IP technology, so that the network has the ability to quickly provide IP access, interoperability with other IP networks, and better Roaming capability and private network IP service capability, and enable the system to provide 144Kbps, 384Kbps and 2Mbps access rate and simple IP and mobile IP service functions. [0003] In the ...

Claims

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Application Information

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IPC IPC(8): H04L12/54H04L9/00H04W28/14
Inventor 黄杰胡爱群裴文江
Owner SOUTHEAST UNIV
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