Method for producing field effect transistor and transistor structure made thereof

Abstract

This invention discloses a method for manufacturing field effect transistors with channels composed of silicon fins and silicon main bodies and the transistors, in which, the orientation of the fin is defferent from the silicon main body. The method includes the following steps: a, forming a hard mask pattern on a base plate including a Si film, b, etching the Si film to a preset thickness anisotropically using said pattern as the mask so as to form not only Si fins going to form channels and Si pattern with source / drain region but also form a Si main body connecting the fins to form channels, c, using the active mask to etch the Si film partly to isolate the source / drain region and the device and d, growing grid dielectric film on the Si channels and depositing grid material and grid mask on the structure to form a grid region.

Description

technical field [0001] The invention relates to a method of manufacturing a field effect transistor and a transistor structure manufactured by the method. More specifically, the present invention relates to a method of manufacturing a field effect transistor including a channel formed of a silicon fin and a silicon body oriented differently from the silicon fin, and a field effect transistor manufactured by the method. Background technique [0002] Currently, in an attempt to reduce the price of semiconductor devices and improve device performance, the size of semiconductor devices continues to decrease according to Moore's law, thereby enabling high integration of semiconductor IC chips. [0003] However, since the channel length of the semiconductor device is reduced below 100 nm, the potential of the channel in the related art field effect transistor must be controlled not only through the gate region but also through the drain region, so that even when the device is in a...

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Problems solved by technology

[0019]The device manufactured by this method has the disadvantage that it requires a large area because the channel width of the device must be increased to increase the current value of the device

[0027] This structure has the problem that it is difficult to control the height of the fins compared to the case of using the SOI substrate because the height control layer damaged by the implantation of heavy ions is used to control the height of the fins. Controlling the Precise Height of Silicon Channels

[0035] This structure has the problem that it is difficult to control the precise height of the silicon channel compared to the case of using the SOI substrate, since the height of the fin is controlled using the grooving process

[0036] In addition, there is a problem that it requires a large area because the channel width of the device must be increased to increase the current value of the device

Another problem is that it is complicated to correct the channel width in the device design

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